diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6e4ebbabe0d..e6cfe6f3e8f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+Wed Mar  5 21:40:57 2003  J"orn Rennecke <joern.rennecke@superh.com>
+
+	* sh.h (OVERRIDE_OPTIONS): For TARGET_SHMEDIA, the minimum value
+	for align_jumps is 4.
+
+	(SECONDARY_INPUT_RELOAD_CLASS): If reloading a PLUS into FPUL,
+	use GENERAL_REGS.
+
 2003-03-05  Stephane Carrez  <stcarrez@nerim.fr>
 
 	* config/m68hc11/m68hc11.h (PAD_VARARGS_DOWN): Define and return
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 0be5f8932dd..49503d180ef 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -507,8 +507,8 @@ do {									\
     align_loops =  1 << (TARGET_SH5 ? 3 : 2);				\
   if (align_jumps == 0)							\
     align_jumps = 1 << CACHE_LOG;					\
-  else if (align_jumps <= 1)						\
-    align_jumps = 2;							\
+  else if (align_jumps < (TARGET_SHMEDIA ? 4 : 2))			\
+    align_jumps = TARGET_SHMEDIA ? 4 : 2;				\
 									\
   /* Allocation boundary (in *bytes*) for the code of a function.	\
      SH1: 32 bit alignment is faster, because instructions are always	\
@@ -1395,8 +1395,9 @@ extern enum reg_class reg_class_from_letter[];
    ? R0_REGS								\
    : (CLASS == FPUL_REGS						\
       && ((GET_CODE (X) == REG						\
-          && (REGNO (X) == MACL_REG || REGNO (X) == MACH_REG		\
-	      || REGNO (X) == T_REG))))					\
+	   && (REGNO (X) == MACL_REG || REGNO (X) == MACH_REG		\
+	       || REGNO (X) == T_REG))					\
+	  || GET_CODE (X) == PLUS))					\
    ? GENERAL_REGS							\
    : CLASS == FPUL_REGS && immediate_operand ((X), (MODE))		\
    ? (GET_CODE (X) == CONST_INT && CONST_OK_FOR_I (INTVAL (X))		\