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S/390: Fix mode in vector merge pattern.

vec_unpacks_hi_v4sf/vec_unpacks_lo_v4sf expand vec_mergeh and vec_mergel
patterns also for z13 with V4SF modes so the patterns should better
accept this.  Fixed by changing the mode iterator to V_128_NOSINGLE
which accepts V4SF unconditionally.

gcc/ChangeLog:

2017-10-04  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/vx-builtins.md ("vec_mergeh<mode>")
	("vec_mergel<mode>"): Change mode iterator to V_128_NOSINGLE.

From-SVN: r253420
This commit is contained in:
Andreas Krebbel 2017-10-04 16:43:09 +00:00 committed by Andreas Krebbel
parent 748d9390b9
commit baf20d8df2
2 changed files with 11 additions and 6 deletions

@ -1,3 +1,8 @@
2017-10-04 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vx-builtins.md ("vec_mergeh<mode>")
("vec_mergel<mode>"): Change mode iterator to V_128_NOSINGLE.
2017-10-04 Wilco Dijkstra <wdijkstr@arm.com>
Revert r253399:

@ -211,9 +211,9 @@
; (vec_select op0) (vec_select op1)
; vmrhb, vmrhh, vmrhf, vmrhg
(define_insn "vec_mergeh<mode>"
[(set (match_operand:VEC_HW 0 "register_operand" "=v")
(unspec:VEC_HW [(match_operand:VEC_HW 1 "register_operand" "v")
(match_operand:VEC_HW 2 "register_operand" "v")]
[(set (match_operand:V_128_NOSINGLE 0 "register_operand" "=v")
(unspec:V_128_NOSINGLE [(match_operand:V_128_NOSINGLE 1 "register_operand" "v")
(match_operand:V_128_NOSINGLE 2 "register_operand" "v")]
UNSPEC_VEC_MERGEH))]
"TARGET_VX"
"vmrh<bhfgq>\t%v0,%1,%2"
@ -221,9 +221,9 @@
; vmrlb, vmrlh, vmrlf, vmrlg
(define_insn "vec_mergel<mode>"
[(set (match_operand:VEC_HW 0 "register_operand" "=v")
(unspec:VEC_HW [(match_operand:VEC_HW 1 "register_operand" "v")
(match_operand:VEC_HW 2 "register_operand" "v")]
[(set (match_operand:V_128_NOSINGLE 0 "register_operand" "=v")
(unspec:V_128_NOSINGLE [(match_operand:V_128_NOSINGLE 1 "register_operand" "v")
(match_operand:V_128_NOSINGLE 2 "register_operand" "v")]
UNSPEC_VEC_MERGEL))]
"TARGET_VX"
"vmrl<bhfgq>\t%v0,%1,%2"