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S/390: Fix mode in vector merge pattern.
vec_unpacks_hi_v4sf/vec_unpacks_lo_v4sf expand vec_mergeh and vec_mergel patterns also for z13 with V4SF modes so the patterns should better accept this. Fixed by changing the mode iterator to V_128_NOSINGLE which accepts V4SF unconditionally. gcc/ChangeLog: 2017-10-04 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/vx-builtins.md ("vec_mergeh<mode>") ("vec_mergel<mode>"): Change mode iterator to V_128_NOSINGLE. From-SVN: r253420
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@ -1,3 +1,8 @@
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2017-10-04 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* config/s390/vx-builtins.md ("vec_mergeh<mode>")
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("vec_mergel<mode>"): Change mode iterator to V_128_NOSINGLE.
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2017-10-04 Wilco Dijkstra <wdijkstr@arm.com>
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Revert r253399:
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@ -211,9 +211,9 @@
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; (vec_select op0) (vec_select op1)
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; vmrhb, vmrhh, vmrhf, vmrhg
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(define_insn "vec_mergeh<mode>"
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[(set (match_operand:VEC_HW 0 "register_operand" "=v")
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(unspec:VEC_HW [(match_operand:VEC_HW 1 "register_operand" "v")
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(match_operand:VEC_HW 2 "register_operand" "v")]
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[(set (match_operand:V_128_NOSINGLE 0 "register_operand" "=v")
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(unspec:V_128_NOSINGLE [(match_operand:V_128_NOSINGLE 1 "register_operand" "v")
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(match_operand:V_128_NOSINGLE 2 "register_operand" "v")]
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UNSPEC_VEC_MERGEH))]
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"TARGET_VX"
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"vmrh<bhfgq>\t%v0,%1,%2"
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@ -221,9 +221,9 @@
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; vmrlb, vmrlh, vmrlf, vmrlg
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(define_insn "vec_mergel<mode>"
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[(set (match_operand:VEC_HW 0 "register_operand" "=v")
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(unspec:VEC_HW [(match_operand:VEC_HW 1 "register_operand" "v")
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(match_operand:VEC_HW 2 "register_operand" "v")]
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[(set (match_operand:V_128_NOSINGLE 0 "register_operand" "=v")
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(unspec:V_128_NOSINGLE [(match_operand:V_128_NOSINGLE 1 "register_operand" "v")
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(match_operand:V_128_NOSINGLE 2 "register_operand" "v")]
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UNSPEC_VEC_MERGEL))]
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"TARGET_VX"
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"vmrl<bhfgq>\t%v0,%1,%2"
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