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[AArch64] Simplify WHILERW and WHILEWR definition

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I'd made WHILERW and WHILEWR use separate patterns from the SVE
WHILE instructions, but they're similar enough that we can use
a single pattern.  This means that we also get the flag-related
patterns "for free".

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
	and UNSPEC_WHILEWR.
	(while_optab_cmp): Handle them.
	* config/aarch64/aarch64-sve.md
	(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
	and add a "@" marker.
	* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
	instead of gen_aarch64_sve2_while_ptest.
	(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.

From-SVN: r280054
This commit is contained in:
Richard Sandiford 2020-01-09 15:26:51 +00:00 committed by Richard Sandiford
parent 6ad9571b17
commit bad5e58a9f
4 changed files with 22 additions and 28 deletions
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12
gcc/ChangeLog
View File

@ -1,3 +1,15 @@
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
and UNSPEC_WHILEWR.
(while_optab_cmp): Handle them.
* config/aarch64/aarch64-sve.md
(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
and add a "@" marker.
* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
instead of gen_aarch64_sve2_while_ptest.
(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...

4
gcc/config/aarch64/aarch64-sve.md
View File

@ -6839,6 +6839,8 @@
;; - WHILELO
;; - WHILELS
;; - WHILELT
;; - WHILERW (SVE2)
;; - WHILEWR (SVE2)
;; -------------------------------------------------------------------------
;; Set element I of the result if (cmp (plus operand1 J) operand2) is
@ -6883,7 +6885,7 @@
)
;; Same, but handle the case in which only the flags result is useful.
(define_insn_and_rewrite "*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest"
(define_insn_and_rewrite "@while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest"
[(set (reg:CC_NZC CC_REGNUM)
(unspec:CC_NZC
[(match_operand 3)

26
gcc/config/aarch64/aarch64-sve2.md
View File

@ -353,7 +353,7 @@
/* Emit a WHILERW or WHILEWR, setting the condition codes based on
the result. */
emit_insn (gen_aarch64_sve2_while_ptest
emit_insn (gen_while_ptest
(<SVE2_WHILE_PTR:unspec>, <MODE>mode, pred_mode,
gen_rtx_SCRATCH (pred_mode), operands[1], operands[2],
CONSTM1_RTX (VNx16BImode), CONSTM1_RTX (pred_mode)));
@ -365,27 +365,3 @@
emit_insn (gen_aarch64_cstore<mode> (operands[0], cmp, cc_reg));
DONE;
})
;; A WHILERW or WHILEWR in which only the flags result is interesting.
(define_insn_and_rewrite "@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest"
[(set (reg:CC_NZC CC_REGNUM)
(unspec:CC_NZC
[(match_operand 3)
(match_operand 4)
(const_int SVE_KNOWN_PTRUE)
(unspec:PRED_ALL
[(match_operand:GPI 1 "register_operand" "r")
(match_operand:GPI 2 "register_operand" "r")]
SVE2_WHILE_PTR)]
UNSPEC_PTEST))
(clobber (match_scratch:PRED_ALL 0 "=Upa"))]
"TARGET_SVE2"
"while<cmp_op>\t%0.<PRED_ALL:Vetype>, %x1, %x2"
;; Force the compiler to drop the unused predicate operand, so that we
;; don't have an unnecessary PTRUE.
"&& (!CONSTANT_P (operands[3]) || !CONSTANT_P (operands[4]))"
{
operands[3] = CONSTM1_RTX (VNx16BImode);
operands[4] = CONSTM1_RTX (<PRED_ALL:MODE>mode);
}
)

8
gcc/config/aarch64/iterators.md
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@ -2083,7 +2083,9 @@
UNSPEC_FCMLA180 UNSPEC_FCMLA270])
(define_int_iterator SVE_WHILE [UNSPEC_WHILELE UNSPEC_WHILELO
UNSPEC_WHILELS UNSPEC_WHILELT])
UNSPEC_WHILELS UNSPEC_WHILELT
(UNSPEC_WHILERW "TARGET_SVE2")
(UNSPEC_WHILEWR "TARGET_SVE2")])
(define_int_iterator SVE2_WHILE_PTR [UNSPEC_WHILERW UNSPEC_WHILEWR])
@ -2496,7 +2498,9 @@
(define_int_attr while_optab_cmp [(UNSPEC_WHILELE "le")
(UNSPEC_WHILELO "ult")
(UNSPEC_WHILELS "ule")
(UNSPEC_WHILELT "lt")])
(UNSPEC_WHILELT "lt")
(UNSPEC_WHILERW "rw")
(UNSPEC_WHILEWR "wr")])
(define_int_attr raw_war [(UNSPEC_WHILERW "raw")
(UNSPEC_WHILEWR "war")])