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i386-builtin-types.def (VOID_FTYPE_INT_INT64): New type.
* config/i386/i386-builtin-types.def (VOID_FTYPE_INT_INT64): New type. * config/i386/i386-builtin.def (__builtin_ia32_xgetbv) (__builtin_ia32_xsetbv): New builtins. * config/i386/i386.c (ix86_expand_special_args_builtin): Process new types. (ix86_expand_builtin): Special expand for new intrinsics. * config/i386/i386.md (UNSPECV_XGETBV, UNSPECV_XSETBV): New. (xsetbv, xsetbv_rex64, xgetbv, xgetbv_rex64): New insn patterns. * config/i386/xsaveintrin.h (_xsetbv, _getbv): New intrinsics. testsuite/ChangeLog: * gcc.target/i386/xgetsetbv.c: New test. From-SVN: r248028
This commit is contained in:
Julia Koval
Uros Bizjak
parent
6fa95e0961
commit
b9bdd60b87
@ -1,3 +1,15 @@
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2017-05-14 Julia Koval <julia.koval@intel.com>
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* config/i386/i386-builtin-types.def (VOID_FTYPE_INT_INT64): New type.
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* config/i386/i386-builtin.def (__builtin_ia32_xgetbv)
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(__builtin_ia32_xsetbv): New builtins.
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* config/i386/i386.c (ix86_expand_special_args_builtin):
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Process new types.
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(ix86_expand_builtin): Special expand for new intrinsics.
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* config/i386/i386.md (UNSPECV_XGETBV, UNSPECV_XSETBV): New.
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(xsetbv, xsetbv_rex64, xgetbv, xgetbv_rex64): New insn patterns.
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* config/i386/xsaveintrin.h (_xsetbv, _getbv): New intrinsics.
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2017-05-13 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
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* cfganal.c (inverted_post_order_compute): Change argument type
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@ -311,6 +311,7 @@ DEF_FUNCTION_TYPE (V8DI, V8DI, V8DI, UQI)
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DEF_FUNCTION_TYPE (V8DI, PV8DI)
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DEF_FUNCTION_TYPE (V8DI, V8DI)
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DEF_FUNCTION_TYPE (VOID, INT, INT64)
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DEF_FUNCTION_TYPE (DI, V2DI, INT)
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DEF_FUNCTION_TYPE (DOUBLE, V2DF, INT)
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DEF_FUNCTION_TYPE (FLOAT, V4SF, INT)
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@ -113,6 +113,8 @@ BDESC (OPTION_MASK_ISA_XSAVEOPT, CODE_FOR_nothing, "__builtin_ia32_xsaveopt", IX
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BDESC (OPTION_MASK_ISA_XSAVES, CODE_FOR_nothing, "__builtin_ia32_xsaves", IX86_BUILTIN_XSAVES, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64)
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BDESC (OPTION_MASK_ISA_XSAVES, CODE_FOR_nothing, "__builtin_ia32_xrstors", IX86_BUILTIN_XRSTORS, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64)
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BDESC (OPTION_MASK_ISA_XSAVEC, CODE_FOR_nothing, "__builtin_ia32_xsavec", IX86_BUILTIN_XSAVEC, UNKNOWN, (int) VOID_FTYPE_PVOID_INT64)
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BDESC (OPTION_MASK_ISA_XSAVE, CODE_FOR_nothing, "__builtin_ia32_xgetbv", IX86_BUILTIN_XGETBV, UNKNOWN, (int) UINT64_FTYPE_INT)
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BDESC (OPTION_MASK_ISA_XSAVE, CODE_FOR_nothing, "__builtin_ia32_xsetbv", IX86_BUILTIN_XSETBV, UNKNOWN, (int) VOID_FTYPE_INT_INT64)
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BDESC (OPTION_MASK_ISA_FXSR | OPTION_MASK_ISA_64BIT, CODE_FOR_nothing, "__builtin_ia32_fxsave64", IX86_BUILTIN_FXSAVE64, UNKNOWN, (int) VOID_FTYPE_PVOID)
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BDESC (OPTION_MASK_ISA_FXSR | OPTION_MASK_ISA_64BIT, CODE_FOR_nothing, "__builtin_ia32_fxrstor64", IX86_BUILTIN_FXRSTOR64, UNKNOWN, (int) VOID_FTYPE_PVOID)
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@ -36220,6 +36220,7 @@ ix86_expand_special_args_builtin (const struct builtin_description *d,
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case V4DI_FTYPE_PCV4DI_V4DI:
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case V4SI_FTYPE_PCV4SI_V4SI:
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case V2DI_FTYPE_PCV2DI_V2DI:
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case VOID_FTYPE_INT_INT64:
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nargs = 2;
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klass = load;
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memory = 0;
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@ -37227,6 +37228,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
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case IX86_BUILTIN_RDPMC:
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case IX86_BUILTIN_RDTSC:
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case IX86_BUILTIN_RDTSCP:
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case IX86_BUILTIN_XGETBV:
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op0 = gen_reg_rtx (DImode);
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op1 = gen_reg_rtx (DImode);
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@ -37243,6 +37245,18 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
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: gen_rdpmc (op0, op2));
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emit_insn (insn);
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}
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else if (fcode == IX86_BUILTIN_XGETBV)
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{
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arg0 = CALL_EXPR_ARG (exp, 0);
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op2 = expand_normal (arg0);
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if (!register_operand (op2, SImode))
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op2 = copy_to_mode_reg (SImode, op2);
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insn = (TARGET_64BIT
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? gen_xgetbv_rex64 (op0, op1, op2)
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: gen_xgetbv (op0, op2));
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emit_insn (insn);
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}
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else if (fcode == IX86_BUILTIN_RDTSC)
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{
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insn = (TARGET_64BIT
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@ -37335,6 +37349,40 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
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emit_insn (pat);
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return 0;
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case IX86_BUILTIN_XSETBV:
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arg0 = CALL_EXPR_ARG (exp, 0);
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arg1 = CALL_EXPR_ARG (exp, 1);
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op0 = expand_normal (arg0);
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op1 = expand_normal (arg1);
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if (!REG_P (op0))
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op0 = copy_to_mode_reg (SImode, op0);
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if (TARGET_64BIT)
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{
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op2 = expand_simple_binop (DImode, LSHIFTRT, op1, GEN_INT (32),
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NULL, 1, OPTAB_DIRECT);
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op2 = gen_lowpart (SImode, op2);
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op1 = gen_lowpart (SImode, op1);
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if (!REG_P (op1))
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op1 = copy_to_mode_reg (SImode, op1);
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if (!REG_P (op2))
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op2 = copy_to_mode_reg (SImode, op2);
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icode = CODE_FOR_xsetbv_rex64;
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pat = GEN_FCN (icode) (op0, op1, op2);
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}
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else
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{
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if (!REG_P (op1))
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op1 = copy_to_mode_reg (DImode, op1);
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icode = CODE_FOR_xsetbv;
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pat = GEN_FCN (icode) (op0, op1);
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}
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if (pat)
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emit_insn (pat);
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return 0;
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case IX86_BUILTIN_XSAVE:
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case IX86_BUILTIN_XRSTOR:
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case IX86_BUILTIN_XSAVE64:
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@ -236,6 +236,8 @@
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UNSPECV_XRSTORS64
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UNSPECV_XSAVEC
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UNSPECV_XSAVEC64
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UNSPECV_XGETBV
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UNSPECV_XSETBV
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;; For atomic compound assignments.
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UNSPECV_FNSTENV
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@ -19029,6 +19031,43 @@
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(set (attr "length")
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(symbol_ref "ix86_attr_length_address_default (insn) + 4"))])
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(define_insn "xsetbv"
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[(unspec_volatile:SI
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[(match_operand:SI 0 "register_operand" "c")
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(match_operand:DI 1 "register_operand" "A")]
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UNSPECV_XSETBV)]
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"!TARGET_64BIT && TARGET_XSAVE"
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"xsetbv"
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[(set_attr "type" "other")])
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(define_insn "xsetbv_rex64"
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[(unspec_volatile:SI
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[(match_operand:SI 0 "register_operand" "c")
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(match_operand:SI 1 "register_operand" "a")
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(match_operand:SI 2 "register_operand" "d")]
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UNSPECV_XSETBV)]
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"TARGET_64BIT && TARGET_XSAVE"
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"xsetbv"
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[(set_attr "type" "other")])
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(define_insn "xgetbv"
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[(set (match_operand:DI 0 "register_operand" "=A")
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(unspec_volatile:DI [(match_operand:SI 1 "register_operand" "c")]
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UNSPECV_XGETBV))]
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"!TARGET_64BIT && TARGET_XSAVE"
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"xgetbv"
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[(set_attr "type" "other")])
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(define_insn "xgetbv_rex64"
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[(set (match_operand:DI 0 "register_operand" "=a")
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(unspec_volatile:DI [(match_operand:SI 2 "register_operand" "c")]
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UNSPECV_XGETBV))
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(set (match_operand:DI 1 "register_operand" "=d")
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(unspec_volatile:DI [(match_dup 2)] UNSPECV_XGETBV))]
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"TARGET_64BIT && TARGET_XSAVE"
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"xgetbv"
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[(set_attr "type" "other")])
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Floating-point instructions for atomic compound assignments
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@ -48,6 +48,20 @@ _xrstor (void *__P, long long __M)
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__builtin_ia32_xrstor (__P, __M);
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}
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extern __inline void
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_xsetbv (unsigned int __A, long long __V)
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{
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__builtin_ia32_xsetbv (__A, __V);
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}
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extern __inline long long
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_xgetbv (unsigned int __A)
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{
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__builtin_ia32_xgetbv (__A);
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}
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#ifdef __x86_64__
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extern __inline void
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -1,3 +1,7 @@
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2017-05-14 Julia Koval <julia.koval@intel.com>
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* gcc.target/i386/xgetsetbv.c: New test.
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2017-05-14 Nicolas Koenig <koenigni@student.ethz.ch>
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PR fortran/80442
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -mrdpid " } */
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/* { dg-options "-O2 -mrdpid" } */
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/* { dg-final { scan-assembler "rdpid\[ \t]+(%|)eax" } } */
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#include <x86intrin.h>
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13
gcc/testsuite/gcc.target/i386/xgetsetbv.c
Normal file
13
gcc/testsuite/gcc.target/i386/xgetsetbv.c
Normal file
@ -0,0 +1,13 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -mxsave" } */
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/* { dg-final { scan-assembler "xgetbv" } } */
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/* { dg-final { scan-assembler "xsetbv" } } */
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#include <x86intrin.h>
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unsigned int
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xgetsetbv (void)
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{
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_xsetbv (0, 0);
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return _xgetbv (0);
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}
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