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re PR target/18269 (-m64 -fPIC does not work on ppc-darwin)
2004-11-07 Andrew Pinski <pinskia@physics.uc.edu>
PR target/18269
* config/darwin.c (machopic_indirect_data_reference):
Call gen_macho_high and gen_macho_low instead of
checking the mode and calling gen_macho_high_di directly.
* config/rs6000/rs6000.c (rs6000_emit_move): Likewise.
* config/rs6000/rs6000.md: Move most of TARGET_MACHO expand/insns
to darwin.md.
(movdf_low, movsf_low, movsf_low_st, movsi_low, macho_correct_pic,
load_macho_picbase, macho_low, macho_high): Removed.
(builtin_setjmp_receiver): Call gen_macho_high and
gen_macho_low instead of checking the mode and calling
gen_macho_high_di directly.
* config/rs6000/darwin.md (load_macho_picbase_di): Use the MD constant.
(movdf_low_si, movsf_low_si, movsf_low_st_si, movsi_low_st):
Moved from rs6000.md.
(macho_high): New expander.
(macho_high_si): Renamed version of macho_high from rs6000.md.
(macho_low): New expander.
(macho_low_si): Renamed version of macho_low from rs6000.md.
(load_macho_picbase): New expander.
(load_macho_picbase_si): Renamed version of load_macho_picbase
from rs6000.md.
(macho_correct_pic): New expander.
(macho_correct_pic_si): Renamed version of macho_correct_pic
from rs6000.md.
From-SVN: r90257
This commit is contained in:
Andrew Pinski
Andrew Pinski
parent
79fd859270
commit
b8a55285ff
@ -1,3 +1,31 @@
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2004-11-07 Andrew Pinski <pinskia@physics.uc.edu>
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PR target/18269
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* config/darwin.c (machopic_indirect_data_reference):
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Call gen_macho_high and gen_macho_low instead of
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checking the mode and calling gen_macho_high_di directly.
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* config/rs6000/rs6000.c (rs6000_emit_move): Likewise.
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* config/rs6000/rs6000.md: Move most of TARGET_MACHO expand/insns
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to darwin.md.
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(movdf_low, movsf_low, movsf_low_st, movsi_low, macho_correct_pic,
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load_macho_picbase, macho_low, macho_high): Removed.
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(builtin_setjmp_receiver): Call gen_macho_high and
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gen_macho_low instead of checking the mode and calling
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gen_macho_high_di directly.
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* config/rs6000/darwin.md (load_macho_picbase_di): Use the MD constant.
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(movdf_low_si, movsf_low_si, movsf_low_st_si, movsi_low_st):
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Moved from rs6000.md.
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(macho_high): New expander.
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(macho_high_si): Renamed version of macho_high from rs6000.md.
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(macho_low): New expander.
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(macho_low_si): Renamed version of macho_low from rs6000.md.
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(load_macho_picbase): New expander.
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(load_macho_picbase_si): Renamed version of load_macho_picbase
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from rs6000.md.
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(macho_correct_pic): New expander.
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(macho_correct_pic_si): Renamed version of macho_correct_pic
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from rs6000.md.
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2004-11-07 Joseph S. Myers <joseph@codesourcery.com>
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* c-decl.c (finish_struct): Use complete sentences for diagnostic
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@ -412,12 +412,8 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
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if (defined && MACHO_DYNAMIC_NO_PIC_P)
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{
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#if defined (TARGET_TOC)
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emit_insn (GET_MODE (orig) == DImode
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? gen_macho_high_di (reg, orig)
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: gen_macho_high (reg, orig));
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emit_insn (GET_MODE (orig) == DImode
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? gen_macho_low_di (reg, reg, orig)
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: gen_macho_low (reg, reg, orig));
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emit_insn (gen_macho_high (reg, orig));
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emit_insn (gen_macho_low (reg, reg, orig));
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#else
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/* some other cpu -- writeme! */
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abort ();
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@ -613,9 +609,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
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rtx asym = XEXP (orig, 0);
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rtx mem;
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emit_insn (mode == DImode
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? gen_macho_high_di (temp_reg, asym)
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: gen_macho_high (temp_reg, asym));
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emit_insn (gen_macho_high (temp_reg, asym));
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mem = gen_const_mem (GET_MODE (orig),
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gen_rtx_LO_SUM (Pmode, temp_reg, asym));
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emit_insn (gen_rtx_SET (VOIDmode, reg, mem));
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@ -27,6 +27,49 @@ Boston, MA 02111-1307, USA. */
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"{cau|addis} %0,%1,ha16(%2)"
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[(set_attr "length" "4")])
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(define_insn "movdf_low_si"
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[(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
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(mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
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(match_operand 2 "" ""))))]
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"TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
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"*
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{
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switch (which_alternative)
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{
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case 0:
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return \"lfd %0,lo16(%2)(%1)\";
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case 1:
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{
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rtx operands2[4];
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operands2[0] = operands[0];
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operands2[1] = operands[1];
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operands2[2] = operands[2];
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if (TARGET_POWERPC64 && TARGET_32BIT)
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/* Note, old assemblers didn't support relocation here. */
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return \"ld %0,lo16(%2)(%1)\";
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else
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{
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operands2[3] = gen_rtx_REG (SImode, RS6000_PIC_OFFSET_TABLE_REGNUM);
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output_asm_insn (\"{l|lwz} %0,lo16(%2)(%1)\", operands);
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#if TARGET_MACHO
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if (MACHO_DYNAMIC_NO_PIC_P)
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output_asm_insn (\"{liu|lis} %L0,ha16(%2+4)\", operands);
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else
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/* We cannot rely on ha16(low half)==ha16(high half), alas,
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although in practice it almost always is. */
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output_asm_insn (\"{cau|addis} %L0,%3,ha16(%2+4)\", operands2);
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#endif
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return (\"{l|lwz} %L0,lo16(%2+4)(%L0)\");
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}
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}
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default:
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abort();
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}
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}"
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[(set_attr "type" "load")
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(set_attr "length" "4,12")])
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(define_insn "movdf_low_di"
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[(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
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(mem:DF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
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@ -69,6 +112,15 @@ Boston, MA 02111-1307, USA. */
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[(set_attr "type" "load")
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(set_attr "length" "4,12")])
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(define_insn "movdf_low_st_si"
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[(set (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
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(match_operand 2 "" "")))
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(match_operand:DF 0 "gpc_reg_operand" "f"))]
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"TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
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"stfd %0,lo16(%2)(%1)"
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[(set_attr "type" "store")
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(set_attr "length" "4")])
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(define_insn "movdf_low_st_di"
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[(set (mem:DF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b")
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(match_operand 2 "" "")))
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@ -78,6 +130,17 @@ Boston, MA 02111-1307, USA. */
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[(set_attr "type" "store")
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(set_attr "length" "4")])
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(define_insn "movsf_low_si"
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[(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r")
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(mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
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(match_operand 2 "" ""))))]
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"TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
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"@
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lfs %0,lo16(%2)(%1)
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{l|lwz} %0,lo16(%2)(%1)"
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[(set_attr "type" "load")
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(set_attr "length" "4")])
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(define_insn "movsf_low_di"
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[(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r")
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(mem:SF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
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@ -89,6 +152,17 @@ Boston, MA 02111-1307, USA. */
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[(set_attr "type" "load")
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(set_attr "length" "4")])
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(define_insn "movsf_low_st_si"
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[(set (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
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(match_operand 2 "" "")))
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(match_operand:SF 0 "gpc_reg_operand" "f,!r"))]
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"TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
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"@
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stfs %0,lo16(%2)(%1)
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{st|stw} %0,lo16(%2)(%1)"
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[(set_attr "type" "store")
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(set_attr "length" "4")])
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(define_insn "movsf_low_st_di"
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[(set (mem:SF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
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(match_operand 2 "" "")))
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@ -110,6 +184,15 @@ Boston, MA 02111-1307, USA. */
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[(set_attr "type" "load")
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(set_attr "length" "4")])
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(define_insn "movsi_low_st"
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[(set (mem:SI (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
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(match_operand 2 "" "")))
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(match_operand:SI 0 "gpc_reg_operand" "r"))]
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"TARGET_MACHO && ! TARGET_64BIT"
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"{st|stw} %0,lo16(%2)(%1)"
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[(set_attr "type" "store")
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(set_attr "length" "4")])
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(define_insn "movdi_low_st"
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[(set (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b")
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(match_operand 2 "" "")))
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@ -119,12 +202,56 @@ Boston, MA 02111-1307, USA. */
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[(set_attr "type" "store")
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(set_attr "length" "4")])
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;; Mach-O PIC trickery.
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(define_expand "macho_high"
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[(set (match_operand 0 "" "")
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(high (match_operand 1 "" "")))]
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"TARGET_MACHO"
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{
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if (TARGET_64BIT)
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emit_insn (gen_macho_high_di (operands[0], operands[1]));
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else
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emit_insn (gen_macho_high_si (operands[0], operands[1]));
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DONE;
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})
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(define_insn "macho_high_si"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=b*r")
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(high:SI (match_operand 1 "" "")))]
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"TARGET_MACHO && ! TARGET_64BIT"
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"{liu|lis} %0,ha16(%1)")
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(define_insn "macho_high_di"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=b*r")
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(high:DI (match_operand 1 "" "")))]
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"TARGET_MACHO && TARGET_64BIT"
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"{liu|lis} %0,ha16(%1)")
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(define_expand "macho_low"
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[(set (match_operand 0 "" "")
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(lo_sum (match_operand 1 "" "")
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(match_operand 2 "" "")))]
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"TARGET_MACHO"
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{
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if (TARGET_64BIT)
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emit_insn (gen_macho_low_di (operands[0], operands[1], operands[2]));
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else
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emit_insn (gen_macho_low_si (operands[0], operands[1], operands[2]));
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DONE;
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})
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(define_insn "macho_low_si"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,!*r")
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(match_operand 2 "" "")))]
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"TARGET_MACHO && ! TARGET_64BIT"
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"@
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{cal %0,%a2@l(%1)|la %0,lo16(%2)(%1)}
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{cal %0,%a2@l(%1)|addic %0,%1,lo16(%2)}")
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(define_insn "macho_low_di"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
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(lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,!*r")
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@ -145,14 +272,65 @@ Boston, MA 02111-1307, USA. */
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(match_dup 2))]
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"")
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(define_expand "load_macho_picbase"
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[(set (match_operand 0 "" "")
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(unspec [(match_operand 1 "" "")]
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UNSPEC_LD_MPIC))]
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"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
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{
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if (TARGET_32BIT)
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emit_insn (gen_load_macho_picbase_si (operands[0], operands[1]));
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else
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emit_insn (gen_load_macho_picbase_di (operands[0], operands[1]));
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DONE;
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})
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(define_insn "load_macho_picbase_si"
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[(set (match_operand:SI 0 "register_operand" "=l")
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(unspec:SI [(match_operand:SI 1 "immediate_operand" "s")]
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UNSPEC_LD_MPIC))]
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"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
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"bcl 20,31,%1\\n%1:"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "load_macho_picbase_di"
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[(set (match_operand:DI 0 "register_operand" "=l")
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(unspec:DI [(match_operand:DI 1 "immediate_operand" "s")] 15))]
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(unspec:DI [(match_operand:DI 1 "immediate_operand" "s")] UNSPEC_LD_MPIC))]
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"(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
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"bcl 20,31,%1\\n%1:"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_expand "macho_correct_pic"
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[(set (match_operand 0 "" "")
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(plus (match_operand 1 "" "")
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(unspec [(match_operand 2 "" "")
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(match_operand 3 "" "")]
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UNSPEC_MPIC_CORRECT)))]
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"DEFAULT_ABI == ABI_DARWIN"
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{
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if (TARGET_32BIT)
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emit_insn (gen_macho_correct_pic_si (operands[0], operands[1], operands[2],
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operands[3]));
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else
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emit_insn (gen_macho_correct_pic_di (operands[0], operands[1], operands[2],
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operands[3]));
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DONE;
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})
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(define_insn "macho_correct_pic_si"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(plus:SI (match_operand:SI 1 "gpc_reg_operand" "r")
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(unspec:SI [(match_operand:SI 2 "immediate_operand" "s")
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(match_operand:SI 3 "immediate_operand" "s")]
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UNSPEC_MPIC_CORRECT)))]
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"DEFAULT_ABI == ABI_DARWIN"
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"addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)"
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[(set_attr "length" "8")])
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(define_insn "macho_correct_pic_di"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(plus:DI (match_operand:DI 1 "gpc_reg_operand" "r")
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@ -4428,16 +4428,8 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
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return;
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}
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#endif
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if (mode == DImode)
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{
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emit_insn (gen_macho_high_di (target, operands[1]));
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emit_insn (gen_macho_low_di (operands[0], target, operands[1]));
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}
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else
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{
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emit_insn (gen_macho_high (target, operands[1]));
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emit_insn (gen_macho_low (operands[0], target, operands[1]));
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}
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emit_insn (gen_macho_high (target, operands[1]));
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emit_insn (gen_macho_low (operands[0], target, operands[1]));
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return;
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}
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@ -7660,21 +7660,6 @@
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{cal|la} %0,%2@l(%1)
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{ai|addic} %0,%1,%K2")
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;; Mach-O PIC trickery.
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(define_insn "macho_high"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=b*r")
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(high:SI (match_operand 1 "" "")))]
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"TARGET_MACHO && ! TARGET_64BIT"
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"{liu|lis} %0,ha16(%1)")
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(define_insn "macho_low"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,!*r")
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(match_operand 2 "" "")))]
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"TARGET_MACHO && ! TARGET_64BIT"
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"@
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{cal %0,%a2@l(%1)|la %0,lo16(%2)(%1)}
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{cal %0,%a2@l(%1)|addic %0,%1,lo16(%2)}")
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;; Set up a register with a value from the GOT table
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@ -7747,88 +7732,6 @@
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[(set_attr "type" "load")
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(set_attr "length" "4")])
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(define_insn "movsi_low_st"
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[(set (mem:SI (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
|
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(match_operand 2 "" "")))
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(match_operand:SI 0 "gpc_reg_operand" "r"))]
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"TARGET_MACHO && ! TARGET_64BIT"
|
||||
"{st|stw} %0,lo16(%2)(%1)"
|
||||
[(set_attr "type" "store")
|
||||
(set_attr "length" "4")])
|
||||
|
||||
(define_insn "movdf_low"
|
||||
[(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
|
||||
(mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
|
||||
(match_operand 2 "" ""))))]
|
||||
"TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
|
||||
"*
|
||||
{
|
||||
switch (which_alternative)
|
||||
{
|
||||
case 0:
|
||||
return \"lfd %0,lo16(%2)(%1)\";
|
||||
case 1:
|
||||
{
|
||||
rtx operands2[4];
|
||||
operands2[0] = operands[0];
|
||||
operands2[1] = operands[1];
|
||||
operands2[2] = operands[2];
|
||||
if (TARGET_POWERPC64 && TARGET_32BIT)
|
||||
/* Note, old assemblers didn't support relocation here. */
|
||||
return \"ld %0,lo16(%2)(%1)\";
|
||||
else
|
||||
{
|
||||
operands2[3] = gen_rtx_REG (SImode, RS6000_PIC_OFFSET_TABLE_REGNUM);
|
||||
output_asm_insn (\"{l|lwz} %0,lo16(%2)(%1)\", operands);
|
||||
#if TARGET_MACHO
|
||||
if (MACHO_DYNAMIC_NO_PIC_P)
|
||||
output_asm_insn (\"{liu|lis} %L0,ha16(%2+4)\", operands);
|
||||
else
|
||||
/* We cannot rely on ha16(low half)==ha16(high half), alas,
|
||||
although in practice it almost always is. */
|
||||
output_asm_insn (\"{cau|addis} %L0,%3,ha16(%2+4)\", operands2);
|
||||
#endif
|
||||
return (\"{l|lwz} %L0,lo16(%2+4)(%L0)\");
|
||||
}
|
||||
}
|
||||
default:
|
||||
abort();
|
||||
}
|
||||
}"
|
||||
[(set_attr "type" "load")
|
||||
(set_attr "length" "4,12")])
|
||||
|
||||
(define_insn "movdf_low_st"
|
||||
[(set (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
|
||||
(match_operand 2 "" "")))
|
||||
(match_operand:DF 0 "gpc_reg_operand" "f"))]
|
||||
"TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
|
||||
"stfd %0,lo16(%2)(%1)"
|
||||
[(set_attr "type" "store")
|
||||
(set_attr "length" "4")])
|
||||
|
||||
(define_insn "movsf_low"
|
||||
[(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r")
|
||||
(mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
|
||||
(match_operand 2 "" ""))))]
|
||||
"TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
|
||||
"@
|
||||
lfs %0,lo16(%2)(%1)
|
||||
{l|lwz} %0,lo16(%2)(%1)"
|
||||
[(set_attr "type" "load")
|
||||
(set_attr "length" "4")])
|
||||
|
||||
(define_insn "movsf_low_st"
|
||||
[(set (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
|
||||
(match_operand 2 "" "")))
|
||||
(match_operand:SF 0 "gpc_reg_operand" "f,!r"))]
|
||||
"TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_64BIT"
|
||||
"@
|
||||
stfs %0,lo16(%2)(%1)
|
||||
{st|stw} %0,lo16(%2)(%1)"
|
||||
[(set_attr "type" "store")
|
||||
(set_attr "length" "4")])
|
||||
|
||||
(define_insn "*movsi_internal1"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m,r,r,r,r,r,*q,*c*l,*h,*h")
|
||||
(match_operand:SI 1 "input_operand" "r,U,m,r,I,L,n,R,*h,r,r,r,0"))]
|
||||
@ -10168,24 +10071,6 @@
|
||||
"{l|lwz} %0,%2-%3(%1)"
|
||||
[(set_attr "type" "load")])
|
||||
|
||||
(define_insn "load_macho_picbase"
|
||||
[(set (match_operand:SI 0 "register_operand" "=l")
|
||||
(unspec:SI [(match_operand:SI 1 "immediate_operand" "s")]
|
||||
UNSPEC_LD_MPIC))]
|
||||
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
|
||||
"bcl 20,31,%1\\n%1:"
|
||||
[(set_attr "type" "branch")
|
||||
(set_attr "length" "4")])
|
||||
|
||||
(define_insn "macho_correct_pic"
|
||||
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
|
||||
(plus:SI (match_operand:SI 1 "gpc_reg_operand" "r")
|
||||
(unspec:SI [(match_operand:SI 2 "immediate_operand" "s")
|
||||
(match_operand:SI 3 "immediate_operand" "s")]
|
||||
UNSPEC_MPIC_CORRECT)))]
|
||||
"DEFAULT_ABI == ABI_DARWIN"
|
||||
"addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)"
|
||||
[(set_attr "length" "8")])
|
||||
|
||||
;; If the TOC is shared over a translation unit, as happens with all
|
||||
;; the kinds of PIC that we support, we need to restore the TOC
|
||||
@ -10212,12 +10097,8 @@
|
||||
CODE_LABEL_NUMBER (operands[0]));
|
||||
tmplabrtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (tmplab));
|
||||
|
||||
emit_insn (TARGET_64BIT
|
||||
? gen_load_macho_picbase_di (picreg, tmplabrtx)
|
||||
: gen_load_macho_picbase (picreg, tmplabrtx));
|
||||
emit_insn (TARGET_64BIT
|
||||
? gen_macho_correct_pic_di (picreg, picreg, picrtx, tmplabrtx)
|
||||
: gen_macho_correct_pic (picreg, picreg, picrtx, tmplabrtx));
|
||||
emit_insn (gen_load_macho_picbase (picreg, tmplabrtx));
|
||||
emit_insn (gen_macho_correct_pic (picreg, picreg, picrtx, tmplabrtx));
|
||||
}
|
||||
else
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user