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*** empty log message ***
From-SVN: r522
This commit is contained in:
Jim Wilson
parent
07fa4fcba0
commit
b85b8af2c0
@ -1133,7 +1133,7 @@ build_selector_translation_table ()
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#ifndef OBJC_NONUNIQUE_SELECTORS
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sprintf (buf, "_OBJC_SELECTOR_REFERENCES_%d", idx);
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sc_spec = build_tree_list (NULLT, ridpointers[RID_STATIC]);
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sc_spec = build_tree_list (NULLT, ridpointers[(int) RID_STATIC]);
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#ifdef OBJC_INT_SELECTORS
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/* static unsigned int _OBJC_SELECTOR_REFERENCES_n = ...; */
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353
gcc/sched.c
353
gcc/sched.c
@ -1180,8 +1180,6 @@ sched_analyze_1 (x, insn)
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/* Analyze reads. */
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if (GET_CODE (x) == SET)
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sched_analyze_2 (SET_SRC (x), insn);
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else if (GET_CODE (x) != CLOBBER)
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sched_analyze_2 (dest, insn);
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}
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/* Analyze the uses of memory and registers in rtx X in INSN. */
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@ -1201,163 +1199,176 @@ sched_analyze_2 (x, insn)
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code = GET_CODE (x);
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/* Get rid of the easy cases first. */
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/* Ignore constants. Note that we must handle CONST_DOUBLE here
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because it may have a cc0_rtx in its CONST_DOUBLE_CHAIN field, but
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this does not mean that this insn is using cc0. */
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if (code == CONST_INT || code == CONST_DOUBLE || code == SYMBOL_REF
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|| code == CONST || code == LABEL_REF)
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return;
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switch (code)
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{
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case CONST_INT:
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case CONST_DOUBLE:
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case SYMBOL_REF:
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case CONST:
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case LABEL_REF:
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/* Ignore constants. Note that we must handle CONST_DOUBLE here
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because it may have a cc0_rtx in its CONST_DOUBLE_CHAIN field, but
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this does not mean that this insn is using cc0. */
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return;
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#ifdef HAVE_cc0
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else if (code == CC0)
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{
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rtx link;
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case CC0:
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{
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rtx link;
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/* User of CC0 depends on immediately preceding insn.
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All notes are removed from the list of insns to schedule before we
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reach here, so the previous insn must be the setter of cc0. */
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if (GET_CODE (PREV_INSN (insn)) != INSN)
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abort ();
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SCHED_GROUP_P (insn) = 1;
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/* User of CC0 depends on immediately preceding insn.
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All notes are removed from the list of insns to schedule before we
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reach here, so the previous insn must be the setter of cc0. */
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if (GET_CODE (PREV_INSN (insn)) != INSN)
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abort ();
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SCHED_GROUP_P (insn) = 1;
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/* Make a copy of all dependencies on PREV_INSN, and add to this insn.
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This is so that all the dependencies will apply to the group. */
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/* Make a copy of all dependencies on PREV_INSN, and add to this insn.
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This is so that all the dependencies will apply to the group. */
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for (link = LOG_LINKS (PREV_INSN (insn)); link; link = XEXP (link, 1))
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add_dependence (insn, XEXP (link, 0), GET_MODE (link));
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for (link = LOG_LINKS (PREV_INSN (insn)); link; link = XEXP (link, 1))
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add_dependence (insn, XEXP (link, 0), GET_MODE (link));
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return;
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}
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return;
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}
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#endif
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else if (code == REG)
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{
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int regno = REGNO (x);
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if (regno < FIRST_PSEUDO_REGISTER)
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{
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int i;
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case REG:
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{
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int regno = REGNO (x);
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if (regno < FIRST_PSEUDO_REGISTER)
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{
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int i;
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i = HARD_REGNO_NREGS (regno, GET_MODE (x));
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while (--i >= 0)
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{
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reg_last_uses[regno + i]
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= gen_rtx (INSN_LIST, VOIDmode,
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insn, reg_last_uses[regno + i]);
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if (reg_last_sets[regno + i])
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add_dependence (insn, reg_last_sets[regno + i], 0);
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if ((call_used_regs[regno + i] || global_regs[regno + i])
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&& last_function_call)
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/* Function calls clobber all call_used regs. */
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add_dependence (insn, last_function_call, REG_DEP_ANTI);
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}
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}
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else
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{
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reg_last_uses[regno]
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= gen_rtx (INSN_LIST, VOIDmode, insn, reg_last_uses[regno]);
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if (reg_last_sets[regno])
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add_dependence (insn, reg_last_sets[regno], 0);
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i = HARD_REGNO_NREGS (regno, GET_MODE (x));
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while (--i >= 0)
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{
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reg_last_uses[regno + i]
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= gen_rtx (INSN_LIST, VOIDmode,
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insn, reg_last_uses[regno + i]);
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if (reg_last_sets[regno + i])
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add_dependence (insn, reg_last_sets[regno + i], 0);
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if ((call_used_regs[regno + i] || global_regs[regno + i])
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&& last_function_call)
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/* Function calls clobber all call_used regs. */
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add_dependence (insn, last_function_call, REG_DEP_ANTI);
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}
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}
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else
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{
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reg_last_uses[regno]
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= gen_rtx (INSN_LIST, VOIDmode, insn, reg_last_uses[regno]);
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if (reg_last_sets[regno])
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add_dependence (insn, reg_last_sets[regno], 0);
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/* If the register does not already cross any calls, then add this
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insn to the sched_before_next_call list so that it will still
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not cross calls after scheduling. */
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if (reg_n_calls_crossed[regno] == 0)
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add_dependence (sched_before_next_call, insn, REG_DEP_ANTI);
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}
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/* If the register does not already cross any calls, then add this
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insn to the sched_before_next_call list so that it will still
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not cross calls after scheduling. */
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if (reg_n_calls_crossed[regno] == 0)
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add_dependence (sched_before_next_call, insn, REG_DEP_ANTI);
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}
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return;
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}
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case MEM:
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{
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/* Reading memory. */
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/* Don't create a dependence for memory references which are known to
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be unchanging, such as constant pool accesses. These will never
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conflict with any other memory access. */
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if (RTX_UNCHANGING_P (x) == 0)
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{
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rtx pending, pending_mem;
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pending = pending_read_insns;
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pending_mem = pending_read_mems;
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while (pending)
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{
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/* If a dependency already exists, don't create a new one. */
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if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
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if (read_dependence (XEXP (pending_mem, 0), x))
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add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
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pending = XEXP (pending, 1);
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pending_mem = XEXP (pending_mem, 1);
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}
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pending = pending_write_insns;
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pending_mem = pending_write_mems;
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while (pending)
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{
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/* If a dependency already exists, don't create a new one. */
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if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
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if (true_dependence (XEXP (pending_mem, 0), x))
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add_dependence (insn, XEXP (pending, 0), 0);
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pending = XEXP (pending, 1);
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pending_mem = XEXP (pending_mem, 1);
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}
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if (last_pending_memory_flush)
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add_dependence (insn, last_pending_memory_flush, REG_DEP_ANTI);
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/* Always add these dependencies to pending_reads, since
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this insn may be followed by a write. */
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add_insn_mem_dependence (&pending_read_insns, &pending_read_mems,
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insn, x);
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}
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/* Take advantage of tail recursion here. */
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sched_analyze_2 (XEXP (x, 0), insn);
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return;
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}
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case ASM_OPERANDS:
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case ASM_INPUT:
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case UNSPEC_VOLATILE:
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{
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rtx u;
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/* Traditional and volatile asm instructions must be considered to use
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and clobber all hard registers and all of memory. So must
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UNSPEC_VOLATILE operations. */
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if ((code == ASM_OPERANDS && MEM_VOLATILE_P (x)) || code == ASM_INPUT
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|| code == UNSPEC_VOLATILE)
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{
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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{
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for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
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if (GET_CODE (PATTERN (XEXP (u, 0))) != USE)
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add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
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reg_last_uses[i] = 0;
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if (reg_last_sets[i]
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&& GET_CODE (PATTERN (reg_last_sets[i])) != USE)
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add_dependence (insn, reg_last_sets[i], 0);
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reg_last_sets[i] = insn;
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}
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flush_pending_lists (insn);
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}
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/* For all ASM_OPERANDS, we must traverse the vector of input operands.
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We can not just fall through here since then we would be confused
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by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
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traditional asms unlike their normal usage. */
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if (code == ASM_OPERANDS)
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{
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for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++)
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sched_analyze_2 (ASM_OPERANDS_INPUT (x, j), insn);
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return;
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}
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break;
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}
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case PRE_DEC:
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case POST_DEC:
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case PRE_INC:
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case POST_INC:
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/* These read and modify the result; just consider them writes. */
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sched_analyze_1 (x, insn);
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return;
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}
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/* The interesting case. */
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else if (code == MEM)
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{
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/* Reading memory. */
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/* Don't create a dependence for memory references which are known to
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be unchanging, such as constant pool accesses. These will never
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conflict with any other memory access. */
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if (RTX_UNCHANGING_P (x) == 0)
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{
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rtx pending, pending_mem;
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pending = pending_read_insns;
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pending_mem = pending_read_mems;
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while (pending)
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{
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/* If a dependency already exists, don't create a new one. */
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if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
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if (read_dependence (XEXP (pending_mem, 0), x))
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add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
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pending = XEXP (pending, 1);
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pending_mem = XEXP (pending_mem, 1);
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}
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pending = pending_write_insns;
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pending_mem = pending_write_mems;
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while (pending)
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{
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/* If a dependency already exists, don't create a new one. */
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if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
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if (true_dependence (XEXP (pending_mem, 0), x))
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add_dependence (insn, XEXP (pending, 0), 0);
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pending = XEXP (pending, 1);
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pending_mem = XEXP (pending_mem, 1);
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}
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if (last_pending_memory_flush)
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add_dependence (insn, last_pending_memory_flush, REG_DEP_ANTI);
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/* Always add these dependencies to pending_reads, since
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this insn may be followed by a write. */
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add_insn_mem_dependence (&pending_read_insns, &pending_read_mems,
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insn, x);
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}
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/* Take advantage of tail recursion here. */
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sched_analyze_2 (XEXP (x, 0), insn);
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return;
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}
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else if (code == ASM_OPERANDS || code == ASM_INPUT
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|| code == UNSPEC_VOLATILE)
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{
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rtx u;
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/* Traditional and volatile asm instructions must be considered to use
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and clobber all hard registers and all of memory. So must
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UNSPEC_VOLATILE operations. */
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if ((code == ASM_OPERANDS && MEM_VOLATILE_P (x)) || code == ASM_INPUT
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|| code == UNSPEC_VOLATILE)
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{
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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{
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for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
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if (GET_CODE (PATTERN (XEXP (u, 0))) != USE)
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add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
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reg_last_uses[i] = 0;
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if (reg_last_sets[i]
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&& GET_CODE (PATTERN (reg_last_sets[i])) != USE)
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add_dependence (insn, reg_last_sets[i], 0);
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reg_last_sets[i] = insn;
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}
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flush_pending_lists (insn);
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}
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/* For all ASM_OPERANDS, we must traverse the vector of input operands.
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We can not just fall through here since then we would be confused
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by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
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traditional asms unlike their normal usage. */
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if (code == ASM_OPERANDS)
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{
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for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++)
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sched_analyze_2 (ASM_OPERANDS_INPUT (x, j), insn);
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return;
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}
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}
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/* Other cases: walk the insn. */
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fmt = GET_RTX_FORMAT (code);
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for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
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@ -1396,56 +1407,6 @@ sched_analyze_insn (x, insn)
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else
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sched_analyze_2 (x, insn);
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for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
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{
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/* Any REG_INC note is a SET of the register indicated. */
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if (REG_NOTE_KIND (link) == REG_INC)
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{
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rtx dest = XEXP (link, 0);
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int regno = REGNO (dest);
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int i;
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/* A hard reg in a wide mode may really be multiple registers.
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If so, mark all of them just like the first. */
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if (regno < FIRST_PSEUDO_REGISTER)
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{
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i = HARD_REGNO_NREGS (regno, GET_MODE (dest));
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while (--i >= 0)
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{
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rtx u;
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for (u = reg_last_uses[regno+i]; u; u = XEXP (u, 1))
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add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
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reg_last_uses[regno + i] = 0;
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if (reg_last_sets[regno + i])
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add_dependence (insn, reg_last_sets[regno + i],
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REG_DEP_OUTPUT);
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reg_last_sets[regno + i] = insn;
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if ((call_used_regs[i] || global_regs[i])
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&& last_function_call)
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/* Function calls clobber all call_used regs. */
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add_dependence (insn, last_function_call, REG_DEP_ANTI);
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}
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}
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else
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{
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rtx u;
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for (u = reg_last_uses[regno]; u; u = XEXP (u, 1))
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add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
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reg_last_uses[regno] = 0;
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if (reg_last_sets[regno])
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add_dependence (insn, reg_last_sets[regno], REG_DEP_OUTPUT);
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reg_last_sets[regno] = insn;
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/* Don't let it cross a call after scheduling if it doesn't
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already cross one. */
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if (reg_n_calls_crossed[regno] == 0 && last_function_call)
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add_dependence (insn, last_function_call, 0);
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}
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}
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}
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/* Handle function calls. */
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if (GET_CODE (insn) == CALL_INSN)
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{
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