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(MASK_BYTE_OPS): New define.
(TARGET_BYTE_OPS): New define. (TARGET_SWITCHES): Handle -mbyte. (LOAD_EXTEND_OP): When MODE is not SImode, return ZERO_EXTEND. From-SVN: r13147
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@ -157,6 +157,11 @@ extern enum alpha_fp_trap_mode alpha_fptm;
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#define MASK_BUILD_CONSTANTS 128
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#define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)
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/* This means that the processor has byte and half word loads and stores. */
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#define MASK_BYTE_OPS 256
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#define TARGET_BYTE_OPS (target_flags & MASK_BYTE_OPS)
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/* Macro to define tables used to set the flags.
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This is a list in braces of pairs in braces,
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each pair being { "NAME", VALUE }
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@ -174,6 +179,7 @@ extern enum alpha_fp_trap_mode alpha_fptm;
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{"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT}, \
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{"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT}, \
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{"build-constants", MASK_BUILD_CONSTANTS}, \
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{"byte", MASK_BYTE_OPS}, \
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{"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} }
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#define TARGET_DEFAULT MASK_FP|MASK_FPREGS
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@ -1466,7 +1472,7 @@ extern void final_prescan_insn ();
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will either zero-extend or sign-extend. The value of this macro should
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be the code that says which one of the two operations is implicitly
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done, NIL if none. */
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#define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
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#define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
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/* Define if loading short immediate values into registers sign extends. */
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#define SHORT_IMMEDIATES_SIGN_EXTEND
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