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Preparing to use shifts to eliminate redundant test/compare insns on H8
* config/h8300/h8300-protos.h (output_a_shift): Make first argument an array of rtx rather than a pointer to rtx. Add code argument. (compute_a_shift_length): Similarly. * config/h8300/h8300.c (h8300_shift_costs): Adjust now that the shift itself isn't an operand. Create dummy operand[0] to carry a mode and pass a suitable rtx code to compute_a_shift_length. (get_shift_alg): Adjust operand number of clobber in output templates. (output_a_shift): Make first argument an array of rtx rather than a pointer to rtx. Add code argument for the type of shift. Adjust now that the shift itself is no longer an operand. (compute_a_shift_length): Similarly. * config/h8300/shiftrotate.md (shiftqi, shifthi, shiftsi): Use an iterator rather than nshift_operator. (shiftqi_noscratch, shifthi_noscratch, shiftsi_noscratch): Likewise. (shiftqi_clobber_flags): Adjust to API changes in output_a_shift and compute_a_shift_length. (shiftqi_noscratch_clobber_flags): Likewise. (shifthi_noscratch_clobber_flags): Likewise. (shiftsi_noscratch_clobber_flags): Likewise.
This commit is contained in:
Jeff Law
parent
8501743106
commit
b60761baa6
@ -28,8 +28,8 @@ along with GCC; see the file COPYING3. If not see
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extern unsigned int compute_mov_length (rtx *);
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extern const char *output_plussi (rtx *, bool);
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extern unsigned int compute_plussi_length (rtx *, bool);
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extern const char *output_a_shift (rtx *);
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extern unsigned int compute_a_shift_length (rtx *);
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extern const char *output_a_shift (rtx[4], rtx_code);
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extern unsigned int compute_a_shift_length (rtx[4], rtx_code);
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extern const char *output_a_rotate (enum rtx_code, rtx *);
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extern unsigned int compute_a_rotate_length (rtx *);
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extern const char *output_simode_bld (int, rtx[]);
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@ -1108,18 +1108,17 @@ h8300_and_costs (rtx x)
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static int
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h8300_shift_costs (rtx x)
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{
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rtx operands[4];
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rtx operands[3];
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if (GET_MODE (x) != QImode
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&& GET_MODE (x) != HImode
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&& GET_MODE (x) != SImode)
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return 100;
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operands[0] = NULL;
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operands[0] = gen_rtx_REG (GET_MODE (x), 0);
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operands[1] = NULL;
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operands[2] = XEXP (x, 1);
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operands[3] = x;
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return compute_a_shift_length (operands) / 2;
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return compute_a_shift_length (operands, GET_CODE (x)) / 2;
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}
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/* Worker function for TARGET_RTX_COSTS. */
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@ -3759,13 +3758,13 @@ get_shift_alg (enum shift_type shift_type, enum shift_mode shift_mode,
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switch (shift_type)
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{
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case SHIFT_ASHIFT:
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info->special = "mov.w\t%e0,%f4\n\tmov.b\t%s4,%t4\n\tmov.b\t%t0,%s4\n\tmov.b\t%s0,%t0\n\tsub.b\t%s0,%s0\n\tmov.w\t%f4,%e0";
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info->special = "mov.w\t%e0,%f3\n\tmov.b\t%s3,%t3\n\tmov.b\t%t0,%s3\n\tmov.b\t%s0,%t0\n\tsub.b\t%s0,%s0\n\tmov.w\t%f3,%e0";
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goto end;
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case SHIFT_LSHIFTRT:
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info->special = "mov.w\t%e0,%f4\n\tmov.b\t%t0,%s0\n\tmov.b\t%s4,%t0\n\tmov.b\t%t4,%s4\n\textu.w\t%f4\n\tmov.w\t%f4,%e0";
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info->special = "mov.w\t%e0,%f3\n\tmov.b\t%t0,%s0\n\tmov.b\t%s3,%t0\n\tmov.b\t%t3,%s3\n\textu.w\t%f3\n\tmov.w\t%f3,%e0";
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goto end;
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case SHIFT_ASHIFTRT:
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info->special = "mov.w\t%e0,%f4\n\tmov.b\t%t0,%s0\n\tmov.b\t%s4,%t0\n\tmov.b\t%t4,%s4\n\texts.w\t%f4\n\tmov.w\t%f4,%e0";
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info->special = "mov.w\t%e0,%f3\n\tmov.b\t%t0,%s0\n\tmov.b\t%s3,%t0\n\tmov.b\t%t3,%s3\n\texts.w\t%f3\n\tmov.w\t%f3,%e0";
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goto end;
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}
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}
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@ -3985,12 +3984,10 @@ h8300_shift_needs_scratch_p (int count, machine_mode mode, enum rtx_code type)
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/* Output the assembler code for doing shifts. */
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const char *
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output_a_shift (rtx *operands)
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output_a_shift (rtx operands[4], rtx_code code)
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{
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static int loopend_lab;
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rtx shift = operands[3];
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machine_mode mode = GET_MODE (shift);
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enum rtx_code code = GET_CODE (shift);
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machine_mode mode = GET_MODE (operands[0]);
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enum shift_type shift_type;
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enum shift_mode shift_mode;
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struct shift_info info;
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@ -4114,10 +4111,10 @@ output_a_shift (rtx *operands)
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if (info.shift2 != NULL)
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{
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fprintf (asm_out_file, "\tmov.b #%d,%sl\n", n / 2,
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names_big[REGNO (operands[4])]);
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names_big[REGNO (operands[3])]);
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fprintf (asm_out_file, ".Llt%d:\n", loopend_lab);
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output_asm_insn (info.shift2, operands);
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output_asm_insn ("add #0xff,%X4", operands);
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output_asm_insn ("add #0xff,%X3", operands);
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fprintf (asm_out_file, "\tbne .Llt%d\n", loopend_lab);
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if (n % 2)
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output_asm_insn (info.shift1, operands);
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@ -4125,10 +4122,10 @@ output_a_shift (rtx *operands)
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else
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{
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fprintf (asm_out_file, "\tmov.b #%d,%sl\n", n,
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names_big[REGNO (operands[4])]);
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names_big[REGNO (operands[3])]);
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fprintf (asm_out_file, ".Llt%d:\n", loopend_lab);
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output_asm_insn (info.shift1, operands);
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output_asm_insn ("add #0xff,%X4", operands);
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output_asm_insn ("add #0xff,%X3", operands);
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fprintf (asm_out_file, "\tbne .Llt%d\n", loopend_lab);
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}
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return "";
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@ -4155,11 +4152,9 @@ h8300_asm_insn_count (const char *templ)
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/* Compute the length of a shift insn. */
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unsigned int
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compute_a_shift_length (rtx *operands)
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compute_a_shift_length (rtx operands[3], rtx_code code)
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{
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rtx shift = operands[3];
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machine_mode mode = GET_MODE (shift);
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enum rtx_code code = GET_CODE (shift);
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enum machine_mode mode = GET_MODE (operands[0]);
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enum shift_type shift_type;
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enum shift_mode shift_mode;
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struct shift_info info;
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@ -152,168 +152,163 @@
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(define_insn_and_split "*shiftqi"
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[(set (match_operand:QI 0 "register_operand" "=r,r")
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(match_operator:QI 3 "nshift_operator"
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[(match_operand:QI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "R,rn")]))
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(clobber (match_scratch:QI 4 "=X,&r"))]
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(shifts:QI
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(match_operand:QI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "R,rn")))
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(clobber (match_scratch:QI 3 "=X,&r"))]
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""
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0) (match_op_dup 3 [(match_dup 1) (match_dup 2)]))
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(clobber (match_dup 4))
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[(parallel [(set (match_dup 0) (shifts:QI (match_dup 1) (match_dup 2)))
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(clobber (match_dup 3))
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(clobber (reg:CC CC_REG))])])
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(define_insn "*shiftqi_clobber_flags"
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[(set (match_operand:QI 0 "register_operand" "=r,r")
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(match_operator:QI 3 "nshift_operator"
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[(match_operand:QI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "R,rn")]))
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(clobber (match_scratch:QI 4 "=X,&r"))
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(shifts:QI
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(match_operand:QI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "R,rn")))
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(clobber (match_scratch:QI 3 "=X,&r"))
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(clobber (reg:CC CC_REG))]
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""
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{
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return output_a_shift (operands);
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return output_a_shift (operands, <CODE>);
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}
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[(set (attr "length")
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(symbol_ref "compute_a_shift_length (operands)"))])
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(symbol_ref "compute_a_shift_length (operands, <CODE>)"))])
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(define_insn_and_split "*shiftqi_noscratch"
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[(set (match_operand:QI 0 "register_operand" "=r,r")
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(match_operator:QI 3 "nshift_operator"
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[(match_operand:QI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "R,rn")]))]
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(shifts:QI
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(match_operand:QI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "R,rn")))]
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"(GET_CODE (operands[2]) == CONST_INT
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), QImode,
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GET_CODE (operands[3])))"
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<CODE>))"
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0) (match_op_dup 3 [(match_dup 1) (match_dup 2)]))
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[(parallel [(set (match_dup 0) (shifts:QI (match_dup 1) (match_dup 2)))
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(clobber (reg:CC CC_REG))])])
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(define_insn "*shiftqi_noscratch_clobber_flags"
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[(set (match_operand:QI 0 "register_operand" "=r,r")
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(match_operator:QI 3 "nshift_operator"
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[(match_operand:QI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "R,rn")]))
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(shifts:QI
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(match_operand:QI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "R,rn")))
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(clobber (reg:CC CC_REG))]
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"(GET_CODE (operands[2]) == CONST_INT
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), QImode,
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GET_CODE (operands[3])))"
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), QImode, <CODE>))"
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{
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return output_a_shift (operands);
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return output_a_shift (operands, <CODE>);
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}
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[(set (attr "length")
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(symbol_ref "compute_a_shift_length (operands)"))])
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(symbol_ref "compute_a_shift_length (operands, <CODE>)"))])
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(define_insn_and_split "*shifthi"
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[(set (match_operand:HI 0 "register_operand" "=r,r")
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(match_operator:HI 3 "nshift_operator"
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[(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "S,rn")]))
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(clobber (match_scratch:QI 4 "=X,&r"))]
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(shifts:HI
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(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "S,rn")))
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(clobber (match_scratch:QI 3 "=X,&r"))]
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""
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0) (match_op_dup 3 [(match_dup 1) (match_dup 2)]))
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(clobber (match_dup 4))
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[(parallel [(set (match_dup 0) (shifts:HI (match_dup 1) (match_dup 2)))
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(clobber (match_dup 3))
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(clobber (reg:CC CC_REG))])])
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(define_insn "*shifthi_clobber_flags"
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[(set (match_operand:HI 0 "register_operand" "=r,r")
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(match_operator:HI 3 "nshift_operator"
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[(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "S,rn")]))
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(clobber (match_scratch:QI 4 "=X,&r"))
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(shifts:HI
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(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "S,rn")))
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(clobber (match_scratch:QI 3 "=X,&r"))
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(clobber (reg:CC CC_REG))]
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""
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{
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return output_a_shift (operands);
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return output_a_shift (operands, <CODE>);
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}
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[(set (attr "length")
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(symbol_ref "compute_a_shift_length (operands)"))])
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(symbol_ref "compute_a_shift_length (operands, <CODE>)"))])
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(define_insn_and_split "*shifthi_noscratch"
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[(set (match_operand:HI 0 "register_operand" "=r,r")
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(match_operator:HI 3 "nshift_operator"
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[(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:HI 2 "nonmemory_operand" "S,rn")]))]
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(shifts:HI
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(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:HI 2 "nonmemory_operand" "S,rn")))]
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"(GET_CODE (operands[2]) == CONST_INT
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), HImode,
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GET_CODE (operands[3])))"
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), HImode, <CODE>))"
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0) (match_op_dup 3 [(match_dup 1) (match_dup 2)]))
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[(parallel [(set (match_dup 0) (shifts:HI (match_dup 1) (match_dup 2)))
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(clobber (reg:CC CC_REG))])])
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(define_insn "*shifthi_noscratch_clobber_flags"
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[(set (match_operand:HI 0 "register_operand" "=r,r")
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(match_operator:HI 3 "nshift_operator"
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[(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:HI 2 "nonmemory_operand" "S,rn")]))
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(shifts:HI
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(match_operand:HI 1 "register_operand" "0,0")
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(match_operand:HI 2 "nonmemory_operand" "S,rn")))
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(clobber (reg:CC CC_REG))]
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"(GET_CODE (operands[2]) == CONST_INT
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), HImode,
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GET_CODE (operands[3])))"
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), HImode, <CODE>))"
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{
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return output_a_shift (operands);
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return output_a_shift (operands, <CODE>);
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}
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[(set (attr "length")
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(symbol_ref "compute_a_shift_length (operands)"))])
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(symbol_ref "compute_a_shift_length (operands, <CODE>)"))])
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(define_insn_and_split "*shiftsi"
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[(set (match_operand:SI 0 "register_operand" "=r,r")
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(match_operator:SI 3 "nshift_operator"
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[(match_operand:SI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "T,rn")]))
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(clobber (match_scratch:QI 4 "=X,&r"))]
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(shifts:SI
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(match_operand:SI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "T,rn")))
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(clobber (match_scratch:QI 3 "=X,&r"))]
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""
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0) (match_op_dup 3 [(match_dup 1) (match_dup 2)]))
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(clobber (match_dup 4))
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[(parallel [(set (match_dup 0) (shifts:SI (match_dup 1) (match_dup 2)))
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(clobber (match_dup 3))
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(clobber (reg:CC CC_REG))])])
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(define_insn "*shiftsi_clobber_flags"
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[(set (match_operand:SI 0 "register_operand" "=r,r")
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(match_operator:SI 3 "nshift_operator"
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[(match_operand:SI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "T,rn")]))
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(clobber (match_scratch:QI 4 "=X,&r"))
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(shifts:SI
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(match_operand:SI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "T,rn")))
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(clobber (match_scratch:QI 3 "=X,&r"))
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(clobber (reg:CC CC_REG))]
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""
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{
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return output_a_shift (operands);
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return output_a_shift (operands, <CODE>);
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}
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[(set (attr "length")
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(symbol_ref "compute_a_shift_length (operands)"))])
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(symbol_ref "compute_a_shift_length (operands, <CODE>)"))])
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(define_insn_and_split "*shiftsi_noscratch"
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[(set (match_operand:SI 0 "register_operand" "=r,r")
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(match_operator:SI 3 "nshift_operator"
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[(match_operand:SI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "T,rn")]))]
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(shifts:SI
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(match_operand:SI 1 "register_operand" "0,0")
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(match_operand:QI 2 "nonmemory_operand" "T,rn")))]
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"(GET_CODE (operands[2]) == CONST_INT
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), SImode,
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GET_CODE (operands[3])))"
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&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), SImode, <CODE>))"
|
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"#"
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"&& reload_completed"
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[(parallel [(set (match_dup 0) (match_op_dup 3 [(match_dup 1) (match_dup 2)]))
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[(parallel [(set (match_dup 0) (shifts:SI (match_dup 1) (match_dup 2)))
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(clobber (reg:CC CC_REG))])])
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|
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(define_insn "*shiftsi_noscratch_clobber_flags"
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[(set (match_operand:SI 0 "register_operand" "=r,r")
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(match_operator:SI 3 "nshift_operator"
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[(match_operand:SI 1 "register_operand" "0,0")
|
||||
(match_operand:SI 2 "nonmemory_operand" "T,rn")]))
|
||||
(shifts:SI
|
||||
(match_operand:SI 1 "register_operand" "0,0")
|
||||
(match_operand:SI 2 "nonmemory_operand" "T,rn")))
|
||||
(clobber (reg:CC CC_REG))]
|
||||
"(GET_CODE (operands[2]) == CONST_INT
|
||||
&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), SImode,
|
||||
GET_CODE (operands[3])))"
|
||||
&& !h8300_shift_needs_scratch_p (INTVAL (operands[2]), SImode, <CODE>))"
|
||||
{
|
||||
return output_a_shift (operands);
|
||||
return output_a_shift (operands, <CODE>);
|
||||
}
|
||||
[(set (attr "length")
|
||||
(symbol_ref "compute_a_shift_length (operands)"))])
|
||||
(symbol_ref "compute_a_shift_length (operands, <CODE>)"))])
|
||||
|
||||
;; Split a variable shift into a loop. If the register containing
|
||||
;; the shift count dies, then we just use that register.
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user