mirror/gcc
2
0
Fork 0
mirror of git://gcc.gnu.org/git/gcc.git synced 2025-02-23 09:59:39 +08:00
Code Issues Packages Projects Releases Wiki Activity

re PR target/53120 (ICE exposing strict_low_part / in/out operand thinko -fno-tree-sra)

Browse Source 
PR target/53120
	* config/m32c/bitops.md (bset_qi): Change operand 2 from having
	a "0" constraint to being a (match_dup 0).

From-SVN: r187368
This commit is contained in:
Nick Clifton 2012-05-10 13:40:20 +00:00 committed by Nick Clifton
parent 8244f25237
commit b5ba5188a5
2 changed files with 8 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
gcc/ChangeLog
View File

@ -1,3 +1,9 @@
2012-05-10 Nick Clifton <nickc@redhat.com>
PR target/53120
* config/m32c/bitops.md (bset_qi): Change operand 2 from having
a "0" constraint to being a (match_dup 0).
2012-05-10 Richard Guenther <rguenther@suse.de>
* stor-layout.c (byte_from_pos): Amend comment.

4
gcc/config/m32c/bitops.md
View File

@ -43,11 +43,11 @@
[(set (match_operand:QI 0 "memsym_operand" "+Si")
(ior:QI (subreg:QI (ashift:HI (const_int 1)
(subreg:QI (match_operand:HI 1 "a_qi_operand" "Raa") 0)) 0)
(match_operand:QI 2 "memsym_operand" "0")))]
(match_dup 0)))]
"TARGET_A16"
"bset\t%0[%1]"
[(set_attr "flags" "n")]
)
)
(define_insn "bset_hi"
[(set (zero_extract:HI (match_operand:QI 0 "memsym_operand" "+Si")