(dect): Rewrite pattern so that it can be combined.

From-SVN: r13307
This commit is contained in:
Joern Rennecke 1996-12-13 19:46:28 +00:00
parent 5c8c0abd1f
commit aff48e325b

View File

@ -222,10 +222,6 @@
""
"movt %0")
;; ??? This combiner pattern does not work, because combine does not combine
;; instructions that set a hard register when SMALL_REGISTER_CLASSES is
;; defined. Perhaps use a pseudo-reg for the T bit?
(define_insn ""
[(set (reg:SI 18)
(eq:SI (and:SI (match_operand:SI 0 "arith_reg_operand" "z,r")
@ -2108,17 +2104,10 @@
;; Misc insns
;; ------------------------------------------------------------------------
;; ??? This combiner pattern does not work, because combine does not combine
;; instructions that set a hard register when SMALL_REGISTER_CLASSES is
;; defined. Perhaps use a pseudo-reg for the T bit?
(define_insn "dect"
[(parallel [(set (match_operand:SI 0 "arith_reg_operand" "=r")
(plus:SI (match_dup 0)
(const_int -1)))
(set (reg:SI 18)
(eq:SI (plus:SI (match_dup 0) (const_int -1))
(const_int 0)))])]
[(set (reg:SI 18)
(eq:SI (match_operand:SI 0 "arith_reg_operand" "+r") (const_int 1)))
(set (match_dup 0) (plus:SI (match_dup 0) (const_int -1)))]
"TARGET_SH2"
"dt %0")