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[AArch64] Remove ashift pattern for QI/HI

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2015-01-19  Jiong Wang  <jiong.wang@arm.com>
	    Andrew Pinski  <apinski@cavium.com>

  gcc/
    PR target/64304
    * config/aarch64/aarch64.md (define_insn "*ashl<mode>3_insn"): Deleted.
    (ashl<mode>3): Don't expand if operands[2] is not constant.

  gcc/testsuite/
    * gcc.target/aarch64/pr64304.c: New testcase.


Co-Authored-By: Andrew Pinski <apinski@cavium.com>

From-SVN: r219844
This commit is contained in:
Jiong Wang 2015-01-19 14:13:33 +00:00 committed by Jiong Wang
parent 36650ec619
commit af129d0787
4 changed files with 31 additions and 9 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2015-01-19 Jiong Wang <jiong.wang@arm.com>
Andrew Pinski <apinski@cavium.com>
PR target/64304
* config/aarch64/aarch64.md (define_insn "*ashl<mode>3_insn"): Deleted.
(ashl<mode>3): Don't expand if operands[2] is not constant.
2015-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/64448

11
gcc/config/aarch64/aarch64.md
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@ -3283,6 +3283,8 @@
DONE;
}
}
else
FAIL;
}
)
@ -3507,15 +3509,6 @@
[(set_attr "type" "shift_reg")]
)
(define_insn "*ashl<mode>3_insn"
[(set (match_operand:SHORT 0 "register_operand" "=r")
(ashift:SHORT (match_operand:SHORT 1 "register_operand" "r")
(match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss")))]
""
"lsl\\t%<w>0, %<w>1, %<w>2"
[(set_attr "type" "shift_reg")]
)
(define_insn "*<optab><mode>3_insn"
[(set (match_operand:SHORT 0 "register_operand" "=r")
(ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r")

4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2015-01-19 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/pr64304.c: New testcase.
2014-01-19 Igor Zamyatin <igor.zamyatin@intel.com>
PR rtl-optimization/64081

18
gcc/testsuite/gcc.target/aarch64/pr64304.c Normal file
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@ -0,0 +1,18 @@
/* { dg-do compile } */
/* { dg-options "-O2 --save-temps" } */
unsigned char byte = 0;
void
set_bit (unsigned int bit, unsigned char value)
{
unsigned char mask = (unsigned char) (1 << (bit & 7));
if (! value)
byte &= (unsigned char)~mask;
else
byte |= mask;
/* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, 7" } } */
}
/* { dg-final { cleanup-saved-temps } } */