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Delete A step Itanium support.
* config/ia64/ia64.c (ia64_print_operand_address): Delete 'B' support. (fixup_errata): Delete TARGET_A_STEP use. * config/ia64/ia64.h (MASK_A_STEP, TARGET_A_STEP): Delete. (TARGET_SWITCHES): Delete -ma-step option. * config/ia64/ia64.md (all FP patterns): Delete %B0. (movqicc_astep, movqi_internal_astep, movhicc_astep, movhi_internal_astep, movsicc_astep, movsi_internal_astep, movdi+1, movdi_internal_astep, movsfcc_astep, movsf_internal_astep, movdfcc_astep, movdf_internal_astep, movtfcc_astep, movtf_internal_astep, cmovdi_internal_astep, cmovsi_internal_astep): Delete. (movqi_internal, movhi_internal, movsi_internal, movdi_internal, movsf_internal, movdf_internal, movtf_internal, cmovdi_internal, cmovsi_internal): Delete ! TARGET_A_STEP check. From-SVN: r39075
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@ -1,3 +1,20 @@
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2001-01-16 Jim Wilson <wilson@redhat.com>
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* config/ia64/ia64.c (ia64_print_operand_address): Delete 'B' support.
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(fixup_errata): Delete TARGET_A_STEP use.
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* config/ia64/ia64.h (MASK_A_STEP, TARGET_A_STEP): Delete.
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(TARGET_SWITCHES): Delete -ma-step option.
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* config/ia64/ia64.md (all FP patterns): Delete %B0.
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(movqicc_astep, movqi_internal_astep, movhicc_astep,
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movhi_internal_astep, movsicc_astep, movsi_internal_astep, movdi+1,
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movdi_internal_astep, movsfcc_astep, movsf_internal_astep,
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movdfcc_astep, movdf_internal_astep, movtfcc_astep,
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movtf_internal_astep, cmovdi_internal_astep, cmovsi_internal_astep):
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Delete.
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(movqi_internal, movhi_internal, movsi_internal, movdi_internal,
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movsf_internal, movdf_internal, movtf_internal, cmovdi_internal,
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cmovsi_internal): Delete ! TARGET_A_STEP check.
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2001-01-16 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at>
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* gcc.texi (Bug Lists): Do not mention newsgroups nor the
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@ -3133,7 +3133,6 @@ ia64_print_operand_address (stream, address)
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}
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/* Print an operand to a assembler instruction.
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B Work arounds for hardware bugs.
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C Swap and print a comparison operator.
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D Print an FP comparison operator.
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E Print 32 - constant, for SImode shifts as extract.
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@ -3167,11 +3166,6 @@ ia64_print_operand (file, x, code)
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/* Handled below. */
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break;
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case 'B':
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if (TARGET_A_STEP)
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fputs (" ;; nop 0 ;; nop 0 ;;", file);
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return;
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case 'C':
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{
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enum rtx_code c = swap_condition (GET_CODE (x));
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@ -4684,7 +4678,7 @@ fixup_errata ()
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group_idx = (group_idx + 1) % 3;
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memset (last_group + group_idx, 0, sizeof last_group[group_idx]);
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}
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if ((TARGET_B_STEP || TARGET_A_STEP) && INSN_P (insn))
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if (TARGET_B_STEP && INSN_P (insn))
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errata_emit_nops (insn);
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}
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}
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@ -53,7 +53,7 @@ extern int target_flags;
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#define MASK_VOL_ASM_STOP 0x00000010 /* Emit stop bits for vol ext asm. */
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#define MASK_A_STEP 0x00000020 /* Emit code for Itanium A step. */
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/* 0x00000020 is available. */
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#define MASK_B_STEP 0x00000040 /* Emit code for Itanium B step. */
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@ -81,8 +81,6 @@ extern int target_flags;
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#define TARGET_VOL_ASM_STOP (target_flags & MASK_VOL_ASM_STOP)
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#define TARGET_A_STEP (target_flags & MASK_A_STEP)
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#define TARGET_B_STEP (target_flags & MASK_B_STEP)
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#define TARGET_REG_NAMES (target_flags & MASK_REG_NAMES)
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@ -126,8 +124,6 @@ extern int target_flags;
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N_("Emit stop bits before and after volatile extended asms") }, \
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{ "no-volatile-asm-stop", -MASK_VOL_ASM_STOP, \
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N_("Don't emit stop bits before and after volatile extended asms") }, \
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{ "a-step", MASK_A_STEP, \
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N_("Emit code for Itanium (TM) processor A step")}, \
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{ "b-step", MASK_B_STEP, \
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N_("Emit code for Itanium (TM) processor B step")}, \
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{ "register-names", MASK_REG_NAMES, \
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