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Delete cycle display scheduling hook.
2002-05-03 David S. Miller <davem@redhat.com> Delete cycle display scheduling hook. * config/ia64/ia64.c (ia64_cycle_display, TARGET_SCHED_CYCLE_DISPLAY, ia64_emit_insn_before): Delete. (ia64_sched_reorder2): Don't check for CODE_FOR_cycle_display and use emit_insn_before instead of ia64_emit_insn_before. * config/ia64/ia64.md (unspec usage): Delete cycle display. (cycle_display): Delete insn pattern. * config/sparc/sparc.md (unspec usage): Delete cycle display. (cycle_display): Delete insn pattern. * config/sparc/sparc.c (sparc_cycle_display, TARGET_SCHED_CYCLE_DISPLAY): Delete. * doc/md.texi (cycle_display): Don't mention. * doc/tm.texi (TARGET_SCHED_CYCLE_DISPLAY): Likewise. From-SVN: r53134
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David S. Miller
David S. Miller
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b37c26149f
commit
aaaed75228
@ -1,3 +1,19 @@
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2002-05-03 David S. Miller <davem@redhat.com>
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Delete cycle display scheduling hook.
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* config/ia64/ia64.c (ia64_cycle_display,
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TARGET_SCHED_CYCLE_DISPLAY, ia64_emit_insn_before): Delete.
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(ia64_sched_reorder2): Don't check for CODE_FOR_cycle_display
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and use emit_insn_before instead of ia64_emit_insn_before.
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* config/ia64/ia64.md (unspec usage): Delete cycle display.
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(cycle_display): Delete insn pattern.
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* config/sparc/sparc.md (unspec usage): Delete cycle display.
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(cycle_display): Delete insn pattern.
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* config/sparc/sparc.c (sparc_cycle_display,
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TARGET_SCHED_CYCLE_DISPLAY): Delete.
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* doc/md.texi (cycle_display): Don't mention.
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* doc/tm.texi (TARGET_SCHED_CYCLE_DISPLAY): Likewise.
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2002-05-03 Richard Henderson <rth@redhat.com>
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* recog.c (store_data_bypass_p, if_test_bypass_p): New.
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@ -152,7 +152,6 @@ static int ia64_internal_sched_reorder PARAMS ((FILE *, int, rtx *,
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static int ia64_sched_reorder PARAMS ((FILE *, int, rtx *, int *, int));
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static int ia64_sched_reorder2 PARAMS ((FILE *, int, rtx *, int *, int));
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static int ia64_variable_issue PARAMS ((FILE *, int, rtx, int));
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static rtx ia64_cycle_display PARAMS ((int, rtx));
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/* Table of valid machine attributes. */
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@ -211,8 +210,6 @@ static const struct attribute_spec ia64_attribute_table[] =
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#define TARGET_SCHED_REORDER ia64_sched_reorder
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#undef TARGET_SCHED_REORDER2
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#define TARGET_SCHED_REORDER2 ia64_sched_reorder2
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#undef TARGET_SCHED_CYCLE_DISPLAY
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#define TARGET_SCHED_CYCLE_DISPLAY ia64_cycle_display
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struct gcc_target targetm = TARGET_INITIALIZER;
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@ -5162,7 +5159,6 @@ int ia64_final_schedule = 0;
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static int itanium_split_issue PARAMS ((const struct ia64_packet *, int));
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static rtx ia64_single_set PARAMS ((rtx));
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static int insn_matches_slot PARAMS ((const struct ia64_packet *, enum attr_type, int, rtx));
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static void ia64_emit_insn_before PARAMS ((rtx, rtx));
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static void maybe_rotate PARAMS ((FILE *));
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static void finish_last_head PARAMS ((FILE *, int));
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static void rotate_one_bundle PARAMS ((FILE *));
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@ -5485,21 +5481,6 @@ insn_matches_slot (p, itype, slot, insn)
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return 0;
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}
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/* Like emit_insn_before, but skip cycle_display insns. This makes the
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assembly output a bit prettier. */
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static void
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ia64_emit_insn_before (insn, before)
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rtx insn, before;
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{
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rtx prev = PREV_INSN (before);
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if (prev && GET_CODE (prev) == INSN
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&& GET_CODE (PATTERN (prev)) == UNSPEC
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&& XINT (PATTERN (prev), 1) == 23)
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before = prev;
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emit_insn_before (insn, before);
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}
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/* When rotating a bundle out of the issue window, insert a bundle selector
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insn in front of it. DUMP is the scheduling dump file or NULL. START
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is either 0 or 3, depending on whether we want to emit a bundle selector
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@ -5531,7 +5512,7 @@ finish_last_head (dump, start)
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fprintf (dump, "// Emitting template before %d: %s\n",
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INSN_UID (insn), b->name);
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ia64_emit_insn_before (gen_bundle_selector (GEN_INT (bundle_type)), insn);
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emit_insn_before (gen_bundle_selector (GEN_INT (bundle_type)), insn);
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}
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/* We can't schedule more insns this cycle. Fix up the scheduling state
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@ -6391,9 +6372,8 @@ ia64_sched_reorder2 (dump, sched_verbose, ready, pn_ready, clock_var)
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abort ();
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insn_code = recog_memoized (stop);
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/* Ignore cycle displays and .pred.rel.mutex. */
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if (insn_code == CODE_FOR_cycle_display
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|| insn_code == CODE_FOR_pred_rel_mutex
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/* Ignore .pred.rel.mutex. */
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if (insn_code == CODE_FOR_pred_rel_mutex
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|| insn_code == CODE_FOR_prologue_use)
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continue;
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@ -6490,7 +6470,7 @@ ia64_variable_issue (dump, sched_verbose, insn, can_issue_more)
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int t = sched_data.first_slot;
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if (t == 0)
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t = 3;
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ia64_emit_insn_before (gen_insn_group_barrier (GEN_INT (t)), insn);
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emit_insn_before (gen_insn_group_barrier (GEN_INT (t)), insn);
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init_insn_group_barriers ();
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sched_data.last_was_stop = 0;
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}
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@ -6547,17 +6527,6 @@ ia64_sched_finish (dump, sched_verbose)
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free (sched_types);
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free (sched_ready);
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}
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static rtx
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ia64_cycle_display (clock, last)
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int clock;
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rtx last;
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{
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if (ia64_final_schedule)
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return emit_insn_after (gen_cycle_display (GEN_INT (clock)), last);
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else
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return last;
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}
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/* Emit pseudo-ops for the assembler to describe predicate relations.
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At present this assumes that we only consider predicate pairs to
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@ -65,7 +65,6 @@
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;; 20 bsp_value
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;; 21 flushrs
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;; 22 bundle selector
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;; 23 cycle display
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;; 24 addp4
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;; 25 prologue_use
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;;
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@ -5012,13 +5011,6 @@
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""
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[(set_attr "itanium_class" "nop_x")])
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(define_insn "cycle_display"
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[(unspec [(match_operand 0 "const_int_operand" "")] 23)]
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""
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"// cycle %0"
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[(set_attr "itanium_class" "ignore")
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(set_attr "predicable" "no")])
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(define_insn "bundle_selector"
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[(unspec [(match_operand 0 "const_int_operand" "")] 22)]
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""
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@ -167,7 +167,6 @@ static int sparc_issue_rate PARAMS ((void));
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static void sparc_sched_init PARAMS ((FILE *, int, int));
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static int sparc_use_dfa_pipeline_interface PARAMS ((void));
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static int sparc_use_sched_lookahead PARAMS ((void));
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static rtx sparc_cycle_display PARAMS ((int, rtx));
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static void emit_soft_tfmode_libcall PARAMS ((const char *, int, rtx *));
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static void emit_soft_tfmode_binop PARAMS ((enum rtx_code, rtx *));
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@ -233,8 +232,6 @@ enum processor_type sparc_cpu;
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE sparc_use_dfa_pipeline_interface
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#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
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#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD sparc_use_sched_lookahead
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#undef TARGET_SCHED_CYCLE_DISPLAY
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#define TARGET_SCHED_CYCLE_DISPLAY sparc_cycle_display
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struct gcc_target targetm = TARGET_INITIALIZER;
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@ -7690,17 +7687,6 @@ sparc_use_sched_lookahead ()
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return 0;
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}
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static rtx
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sparc_cycle_display (clock, last)
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int clock;
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rtx last;
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{
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if (reload_completed)
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return emit_insn_after (gen_cycle_display (GEN_INT (clock)), last);
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else
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return last;
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}
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static int
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sparc_issue_rate ()
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{
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@ -44,7 +44,6 @@
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;; 16 embmedany_textlo
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;; 18 sethm
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;; 19 setlo
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;; 20 cycle_display
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;;
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;; UNSPEC_VOLATILE: 0 blockage
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;; 1 flush_register_windows
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@ -9316,9 +9315,3 @@
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"TARGET_V9"
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"t%C0\\t%%xcc, %1"
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[(set_attr "type" "misc")])
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(define_insn "cycle_display"
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[(unspec [(match_operand 0 "const_int_operand" "")] 20)]
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""
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"! cycle %0"
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[(set_attr "length" "0")])
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@ -3200,14 +3200,6 @@ respectively, a low or moderate degree of temporal locality.
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Targets that do not support write prefetches or locality hints can ignore
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the values of operands 1 and 2.
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@cindex @code{cycle_display} instruction pattern
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@item @samp{cycle_display}
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This pattern, if present, will be emitted by the instruction scheduler at
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the beginning of each new clock cycle. This can be used for annotating the
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assembler output with cycle counts. Operand 0 is a @code{const_int} that
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holds the clock cycle.
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@end table
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@node Pattern Ordering
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@ -5498,14 +5498,6 @@ to. @var{verbose} is the verbose level provided by
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@option{-fsched-verbose-@var{n}}.
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@end deftypefn
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@deftypefn {Target Hook} rtx TARGET_SCHED_CYCLE_DISPLAY (int @var{clock}, rtx @var{last})
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This hook is called in verbose mode only, at the beginning of each pass
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over a basic block. It should insert an insn into the chain after
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@var{last}, which has no effect, but records the value @var{clock} in
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RTL dumps and assembly output. Define this hook only if you need this
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level of detail about what the scheduler is doing.
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@end deftypefn
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@deftypefn {Target Hook} int TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE (void)
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This hook is called many times during insn scheduling. If the hook
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returns nonzero, the automaton based pipeline description is used for
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@ -2019,10 +2019,6 @@ schedule_block (b, rgn_n_insns)
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list. */
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queue_to_ready (&ready);
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if (sched_verbose && targetm.sched.cycle_display)
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last_scheduled_insn
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= (*targetm.sched.cycle_display) (clock_var, last_scheduled_insn);
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if (ready.n_ready == 0)
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abort ();
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