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i386.md (atansf2, [...]): Move near atan2?f3 expanders.
2004-04-30 Uros Bizjak <uros@kss-loka.si> * config/i386/i386.md (atansf2, atandf2, atanxf2): Move near atan2?f3 expanders. From-SVN: r81326
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@ -1,3 +1,8 @@
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2004-04-30 Uros Bizjak <uros@kss-loka.si>
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* config/i386/i386.md (atansf2, atandf2, atanxf2): Move near
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atan2?f3 expanders.
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2004-04-29 Nick Clifton <nickc@redhat.com>
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Bug 14093
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@ -15235,6 +15235,19 @@
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DONE;
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})
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(define_expand "atandf2"
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[(parallel [(set (match_operand:DF 0 "register_operand" "")
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(unspec:DF [(match_dup 2)
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(match_operand:DF 1 "register_operand" "")]
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UNSPEC_FPATAN))
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(clobber (match_scratch:DF 3 ""))])]
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
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&& flag_unsafe_math_optimizations"
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{
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operands[2] = gen_reg_rtx (DFmode);
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emit_move_insn (operands[2], CONST1_RTX (DFmode)); /* fld1 */
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})
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(define_insn "atan2sf3_1"
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[(set (match_operand:SF 0 "register_operand" "=f")
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(unspec:SF [(match_operand:SF 2 "register_operand" "0")
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@ -15260,6 +15273,19 @@
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DONE;
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})
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(define_expand "atansf2"
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[(parallel [(set (match_operand:SF 0 "register_operand" "")
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(unspec:SF [(match_dup 2)
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(match_operand:SF 1 "register_operand" "")]
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UNSPEC_FPATAN))
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(clobber (match_scratch:SF 3 ""))])]
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
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&& flag_unsafe_math_optimizations"
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{
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operands[2] = gen_reg_rtx (SFmode);
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emit_move_insn (operands[2], CONST1_RTX (SFmode)); /* fld1 */
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})
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(define_insn "atan2xf3_1"
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[(set (match_operand:XF 0 "register_operand" "=f")
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(unspec:XF [(match_operand:XF 2 "register_operand" "0")
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@ -15285,6 +15311,19 @@
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DONE;
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})
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(define_expand "atanxf2"
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[(parallel [(set (match_operand:XF 0 "register_operand" "")
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(unspec:XF [(match_dup 2)
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(match_operand:XF 1 "register_operand" "")]
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UNSPEC_FPATAN))
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(clobber (match_scratch:XF 3 ""))])]
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
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&& flag_unsafe_math_optimizations"
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{
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operands[2] = gen_reg_rtx (XFmode);
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emit_move_insn (operands[2], CONST1_RTX (XFmode)); /* fld1 */
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})
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(define_expand "asindf2"
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[(set (match_dup 2)
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(float_extend:XF (match_operand:DF 1 "register_operand" "")))
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@ -15943,45 +15982,6 @@
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operands[i] = gen_reg_rtx (XFmode);
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emit_move_insn (operands[6], CONST1_RTX (XFmode)); /* fld1 */
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})
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(define_expand "atansf2"
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[(parallel [(set (match_operand:SF 0 "register_operand" "")
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(unspec:SF [(match_dup 2)
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(match_operand:SF 1 "register_operand" "")]
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UNSPEC_FPATAN))
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(clobber (match_scratch:SF 3 ""))])]
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
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&& flag_unsafe_math_optimizations"
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{
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operands[2] = gen_reg_rtx (SFmode);
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emit_move_insn (operands[2], CONST1_RTX (SFmode)); /* fld1 */
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})
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(define_expand "atandf2"
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[(parallel [(set (match_operand:DF 0 "register_operand" "")
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(unspec:DF [(match_dup 2)
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(match_operand:DF 1 "register_operand" "")]
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UNSPEC_FPATAN))
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(clobber (match_scratch:DF 3 ""))])]
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
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&& flag_unsafe_math_optimizations"
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{
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operands[2] = gen_reg_rtx (DFmode);
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emit_move_insn (operands[2], CONST1_RTX (DFmode)); /* fld1 */
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})
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(define_expand "atanxf2"
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[(parallel [(set (match_operand:XF 0 "register_operand" "")
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(unspec:XF [(match_dup 2)
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(match_operand:XF 1 "register_operand" "")]
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UNSPEC_FPATAN))
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(clobber (match_scratch:XF 3 ""))])]
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
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&& flag_unsafe_math_optimizations"
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{
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operands[2] = gen_reg_rtx (XFmode);
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emit_move_insn (operands[2], CONST1_RTX (XFmode)); /* fld1 */
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})
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;; Block operation instructions
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