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loop.c (loop_insn_first_p, [...]): New functions.
* loop.c (loop_insn_first_p, biv_elimination_giv_has_0_offset): New functions. (maybe_eliminate_biv_1): Use biv_elimination_giv_has_0_offset. From-SVN: r25167
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@ -1,3 +1,9 @@
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Fri Feb 12 18:29:11 1999 J"orn Rennecke <amylaar@cygnus.co.uk>
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* loop.c (loop_insn_first_p, biv_elimination_giv_has_0_offset):
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New functions.
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(maybe_eliminate_biv_1): Use biv_elimination_giv_has_0_offset.
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Fri Feb 12 16:56:10 1999 J"orn Rennecke <amylaar@cygnus.co.uk>
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* loop.c (load_mems): Don't guess how to do a load / store, use
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120
gcc/loop.c
120
gcc/loop.c
@ -375,7 +375,12 @@ static void instrument_loop_bct PROTO((rtx, rtx, rtx));
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int indirect_jump_in_function = 0;
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static int indirect_jump_in_function_p PROTO((rtx));
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static int compute_luids PROTO ((rtx, rtx, int));
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static int compute_luids PROTO((rtx, rtx, int));
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static int loop_insn_first_p PROTO((rtx, rtx));
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static int biv_elimination_giv_has_0_offset PROTO((struct induction *,
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struct induction *, rtx));
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/* Relative gain of eliminating various kinds of operations. */
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static int add_cost;
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@ -8078,6 +8083,59 @@ maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
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return 0;
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}
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/* INSN and REFERENCE are instructions in the same insn chain.
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Return non-zero if INSN is first.
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This is like insn_first_p, except that we use the luid information if
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available. */
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static int
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loop_insn_first_p (insn, reference)
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rtx insn, reference;
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{
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return ((INSN_UID (insn) < max_uid_for_loop
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&& INSN_UID (reference) < max_uid_for_loop)
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? INSN_LUID (insn) < INSN_LUID (reference)
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: insn_first_p (insn, reference));
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}
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/* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
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the offset that we have to take into account due to auto-increment /
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div derivation is zero. */
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static int
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biv_elimination_giv_has_0_offset (biv, giv, insn)
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struct induction *biv, *giv;
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rtx insn;
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{
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/* If the giv V had the auto-inc address optimization applied
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to it, and INSN occurs between the giv insn and the biv
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insn, then we'd have to adjust the value used here.
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This is rare, so we don't bother to make this possible. */
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if (giv->auto_inc_opt
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&& ((loop_insn_first_p (giv->insn, insn)
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&& loop_insn_first_p (insn, biv->insn))
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|| (loop_insn_first_p (biv->insn, insn)
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&& loop_insn_first_p (insn, giv->insn))))
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return 0;
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/* If the giv V was derived from another giv, and INSN does
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not occur between the giv insn and the biv insn, then we'd
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have to adjust the value used here. This is rare, so we don't
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bother to make this possible. */
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if (giv->derived_from
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&& ! (giv->always_executed
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&& loop_insn_first_p (giv->insn, insn)
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&& loop_insn_first_p (insn, biv->insn)))
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return 0;
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if (giv->same
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&& giv->same->derived_from
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&& ! (giv->same->always_executed
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&& loop_insn_first_p (giv->same->insn, insn)
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&& loop_insn_first_p (insn, biv->insn)))
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return 0;
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return 1;
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}
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/* If BL appears in X (part of the pattern of INSN), see if we can
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eliminate its use. If so, return 1. If not, return 0.
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@ -8143,15 +8201,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
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&& v->mode == mode
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&& 0)
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{
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/* If the giv V had the auto-inc address optimization applied
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to it, and INSN occurs between the giv insn and the biv
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insn, then we must adjust the value used here.
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This is rare, so we don't bother to do so. */
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if (v->auto_inc_opt
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&& ((INSN_LUID (v->insn) < INSN_LUID (insn)
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&& INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
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|| (INSN_LUID (v->insn) > INSN_LUID (insn)
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&& INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
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if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
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continue;
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if (! eliminate_p)
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@ -8186,15 +8236,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
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|| (GET_CODE (v->add_val) == REG
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&& REGNO_POINTER_FLAG (REGNO (v->add_val)))))
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{
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/* If the giv V had the auto-inc address optimization applied
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to it, and INSN occurs between the giv insn and the biv
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insn, then we must adjust the value used here.
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This is rare, so we don't bother to do so. */
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if (v->auto_inc_opt
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&& ((INSN_LUID (v->insn) < INSN_LUID (insn)
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&& INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
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|| (INSN_LUID (v->insn) > INSN_LUID (insn)
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&& INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
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if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
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continue;
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if (! eliminate_p)
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@ -8259,15 +8301,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
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&& ! v->ignore && ! v->maybe_dead && v->always_computable
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&& v->mode == mode)
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{
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/* If the giv V had the auto-inc address optimization applied
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to it, and INSN occurs between the giv insn and the biv
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insn, then we must adjust the value used here.
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This is rare, so we don't bother to do so. */
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if (v->auto_inc_opt
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&& ((INSN_LUID (v->insn) < INSN_LUID (insn)
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&& INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
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|| (INSN_LUID (v->insn) > INSN_LUID (insn)
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&& INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
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if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
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continue;
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if (! eliminate_p)
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@ -8310,15 +8344,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
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{
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rtx tem;
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/* If the giv V had the auto-inc address optimization applied
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to it, and INSN occurs between the giv insn and the biv
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insn, then we must adjust the value used here.
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This is rare, so we don't bother to do so. */
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if (v->auto_inc_opt
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&& ((INSN_LUID (v->insn) < INSN_LUID (insn)
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&& INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
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|| (INSN_LUID (v->insn) > INSN_LUID (insn)
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&& INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
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if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
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continue;
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if (! eliminate_p)
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@ -8354,15 +8380,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
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{
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rtx tem;
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/* If the giv V had the auto-inc address optimization applied
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to it, and INSN occurs between the giv insn and the biv
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insn, then we must adjust the value used here.
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This is rare, so we don't bother to do so. */
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if (v->auto_inc_opt
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&& ((INSN_LUID (v->insn) < INSN_LUID (insn)
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&& INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
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|| (INSN_LUID (v->insn) > INSN_LUID (insn)
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&& INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
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if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
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continue;
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if (! eliminate_p)
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@ -8416,15 +8434,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
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&& rtx_equal_p (tv->add_val, v->add_val)
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&& tv->mode == mode)
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{
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/* If the giv V had the auto-inc address optimization applied
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to it, and INSN occurs between the giv insn and the biv
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insn, then we must adjust the value used here.
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This is rare, so we don't bother to do so. */
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if (v->auto_inc_opt
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&& ((INSN_LUID (v->insn) < INSN_LUID (insn)
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&& INSN_LUID (insn) < INSN_LUID (bl->biv->insn))
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|| (INSN_LUID (v->insn) > INSN_LUID (insn)
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&& INSN_LUID (insn) > INSN_LUID (bl->biv->insn))))
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if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
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continue;
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if (! eliminate_p)
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