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c4x.md (fixuns_truncqfqi2): Rewrite.
2000-02-05 Michael Hayes <m.hayes@elec.canterbury.ac.nz> * config/c4x/c4x.md (fixuns_truncqfqi2): Rewrite. * config/c4x/libgcc.S (ufix_truncqfhi2n): Fix. From-SVN: r31797
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@ -1,3 +1,8 @@
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2000-02-05 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
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* config/c4x/c4x.md (fixuns_truncqfqi2): Rewrite.
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* config/c4x/libgcc.S (ufix_truncqfhi2n): Fix.
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2000-02-04 Bruce Korb <bkorb@gnu.org>
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* fixinc/genfixes(machname.h):
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@ -3751,20 +3751,33 @@
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"c4x_emit_libcall (fix_truncqfhi2_libfunc, FIX, HImode, QFmode, 2, operands);
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DONE;")
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; Is this allowed to be implementation dependent? If so, we can
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; omit the conditional load. Otherwise we should emit a split.
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(define_expand "fixuns_truncqfqi2"
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[(parallel [(set (reg:CC 21)
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(compare:CC (fix:QI (match_operand:QF 1 "src_operand" "fHm"))
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(const_int 0)))
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[(set (match_dup 2) (match_dup 5))
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(set (reg:CC 21)
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(compare:CC (match_operand:QF 1 "src_operand" "fHm")
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(match_dup 2)))
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(set (match_dup 2)
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(fix:QI (match_dup 1)))])
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(set (match_operand:QI 0 "reg_operand" "=r")
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(if_then_else:QI (lt (reg:CC 21) (const_int 0))
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(const_int 0)
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(match_dup 2)))]
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(if_then_else:QF (lt (reg:CC 21) (const_int 0))
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(match_dup 4)
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(match_dup 2)))
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(parallel [(set (match_dup 2)
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(plus:QF (match_dup 2) (match_dup 2)))
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(clobber (reg:CC_NOOV 21))])
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(parallel [(set (match_dup 2)
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(minus:QF (match_dup 1) (match_dup 2)))
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(clobber (reg:CC_NOOV 21))])
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(parallel [(set (match_operand:QI 0 "reg_operand" "=r")
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(fix:QI (match_dup 2)))
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(clobber (reg:CC 21))])]
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""
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"operands[2] = gen_reg_rtx (QImode);")
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"operands[2] = gen_reg_rtx (QFmode);
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operands[3] = gen_reg_rtx (QFmode);
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operands[4] = gen_reg_rtx (QFmode);
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operands[5] = gen_reg_rtx (QFmode);
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emit_move_insn (operands[4],
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immed_real_const_1 (REAL_VALUE_ATOF (\"0.0\", QFmode), QFmode));
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emit_move_insn (operands[5],
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immed_real_const_1 (REAL_VALUE_ATOF (\"2147483648.0\", QFmode), QFmode));")
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(define_expand "fixuns_truncqfhi2"
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[(parallel [(set (match_operand:HI 0 "reg_operand" "")
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@ -1076,7 +1076,7 @@ ufix_truncqfhi2n:
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ash -24,r3
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subi 31,r3
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cmpi 32,r3
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bge ufix1
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bgt ufix1
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cmpi -32,r3
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ble ufix1
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ldi 1,r0
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@ -1223,7 +1223,7 @@ ufix_trunchfhi2n:
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ash -24,r3
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subi 31,r3
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cmpi 32,r3
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bge ufixh1
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bgt ufixh1
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cmpi -32,r3
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ble ufixh1
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ldi 1,r0
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