From a50cfd52a6419578d6010b1a6e4301a308b68017 Mon Sep 17 00:00:00 2001
From: Daniel Egger <degger@fhm.edu>
Date: Tue, 26 Feb 2002 06:50:25 +0000
Subject: [PATCH] rs6000.md: Swap define_insn attributes to fix incorrect
generation of merge high...
2002-02-26 Daniel Egger <degger@fhm.edu>
* config/rs6000/rs6000.md: Swap define_insn attributes to
fix incorrect generation of merge high instructions instead
of merge low.
From-SVN: r50047
---
gcc/ChangeLog | 6 ++++++
gcc/config/rs6000/rs6000.md | 43 +++++++++++++++++++------------------
2 files changed, 28 insertions(+), 21 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2a705deb16cf..98b20742d729 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2002-02-26 Daniel Egger <degger@fhm.edu>
+
+ * config/rs6000/rs6000.md: Swap define_insn attributes to
+ fix incorrect generation of merge high instructions instead
+ of merge low.
+
2002-02-26 Aldy Hernandez <aldyh@redhat.com>
* c-typeck.c (really_start_incremental_init): Use
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index fdefd2a2ecb9..1def589df2de 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -14551,22 +14551,23 @@
(define_insn "altivec_vmrglb"
[(set (match_operand:V16QI 0 "register_operand" "=v")
(vec_merge:V16QI (vec_select:V16QI (match_operand:V16QI 2 "register_operand" "v")
- (parallel [(const_int 8)
- (const_int 9)
- (const_int 10)
- (const_int 11)
- (const_int 12)
- (const_int 13)
- (const_int 14)
- (const_int 15)
- (const_int 0)
+
+ (parallel [(const_int 0)
(const_int 1)
(const_int 2)
(const_int 3)
(const_int 4)
(const_int 5)
- (const_int 6)
- (const_int 7)]))
+ (const_int 6)
+ (const_int 7)
+ (const_int 8)
+ (const_int 9)
+ (const_int 10)
+ (const_int 11)
+ (const_int 12)
+ (const_int 13)
+ (const_int 14)
+ (const_int 15)]))
(match_operand:V16QI 1 "register_operand" "v")
(const_int 255)))]
"TARGET_ALTIVEC"
@@ -14576,14 +14577,14 @@
(define_insn "altivec_vmrglh"
[(set (match_operand:V8HI 0 "register_operand" "=v")
(vec_merge:V8HI (vec_select:V8HI (match_operand:V8HI 2 "register_operand" "v")
- (parallel [(const_int 4)
- (const_int 5)
- (const_int 6)
- (const_int 7)
- (const_int 0)
+ (parallel [(const_int 0)
(const_int 1)
(const_int 2)
- (const_int 3)]))
+ (const_int 3)
+ (const_int 4)
+ (const_int 5)
+ (const_int 6)
+ (const_int 7)]))
(match_operand:V8HI 1 "register_operand" "v")
(const_int 15)))]
"TARGET_ALTIVEC"
@@ -14593,10 +14594,10 @@
(define_insn "altivec_vmrglw"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(vec_merge:V4SI (vec_select:V4SI (match_operand:V4SI 2 "register_operand" "v")
- (parallel [(const_int 2)
- (const_int 3)
- (const_int 0)
- (const_int 1)]))
+ (parallel [(const_int 0)
+ (const_int 1)
+ (const_int 2)
+ (const_int 3)]))
(match_operand:V4SI 1 "register_operand" "v")
(const_int 12)))]
"TARGET_ALTIVEC"