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rs6000.md: Swap define_insn attributes to fix incorrect generation of merge high...

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2002-02-26  Daniel Egger  <degger@fhm.edu>

        * config/rs6000/rs6000.md: Swap define_insn attributes to
        fix incorrect generation of merge high instructions instead
        of merge low.

From-SVN: r50047
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Daniel Egger 2002-02-26 06:50:25 +00:00 committed by Aldy Hernandez
parent b799728433
commit a50cfd52a6
2 changed files with 28 additions and 21 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2002-02-26 Daniel Egger <degger@fhm.edu>
* config/rs6000/rs6000.md: Swap define_insn attributes to
fix incorrect generation of merge high instructions instead
of merge low.
2002-02-26 Aldy Hernandez <aldyh@redhat.com>
* c-typeck.c (really_start_incremental_init): Use

43
gcc/config/rs6000/rs6000.md
View File

@ -14551,22 +14551,23 @@
(define_insn "altivec_vmrglb"
[(set (match_operand:V16QI 0 "register_operand" "=v")
(vec_merge:V16QI (vec_select:V16QI (match_operand:V16QI 2 "register_operand" "v")
(parallel [(const_int 8)
(const_int 9)
(const_int 10)
(const_int 11)
(const_int 12)
(const_int 13)
(const_int 14)
(const_int 15)
(const_int 0)
(parallel [(const_int 0)
(const_int 1)
(const_int 2)
(const_int 3)
(const_int 4)
(const_int 5)
(const_int 6)
(const_int 7)]))
(const_int 6)
(const_int 7)
(const_int 8)
(const_int 9)
(const_int 10)
(const_int 11)
(const_int 12)
(const_int 13)
(const_int 14)
(const_int 15)]))
(match_operand:V16QI 1 "register_operand" "v")
(const_int 255)))]
"TARGET_ALTIVEC"
@ -14576,14 +14577,14 @@
(define_insn "altivec_vmrglh"
[(set (match_operand:V8HI 0 "register_operand" "=v")
(vec_merge:V8HI (vec_select:V8HI (match_operand:V8HI 2 "register_operand" "v")
(parallel [(const_int 4)
(const_int 5)
(const_int 6)
(const_int 7)
(const_int 0)
(parallel [(const_int 0)
(const_int 1)
(const_int 2)
(const_int 3)]))
(const_int 3)
(const_int 4)
(const_int 5)
(const_int 6)
(const_int 7)]))
(match_operand:V8HI 1 "register_operand" "v")
(const_int 15)))]
"TARGET_ALTIVEC"
@ -14593,10 +14594,10 @@
(define_insn "altivec_vmrglw"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(vec_merge:V4SI (vec_select:V4SI (match_operand:V4SI 2 "register_operand" "v")
(parallel [(const_int 2)
(const_int 3)
(const_int 0)
(const_int 1)]))
(parallel [(const_int 0)
(const_int 1)
(const_int 2)
(const_int 3)]))
(match_operand:V4SI 1 "register_operand" "v")
(const_int 12)))]
"TARGET_ALTIVEC"