mirror of
git://gcc.gnu.org/git/gcc.git
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[multiple changes]
2011-06-13 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/rs6000.md (movdi_mfpgpr): Remove POWER mnemonic.
(movdi_internal64): Same.
2011-06-13 Edmar Wienskoski <edmar@freescale.com>
* config/rs6000/rs6000.md (save_gpregs_<mode>): Replaced pattern
with a set of similar patterns, where the MATCH_OPERAND for the
function argument is replaced with individual references to hardware
registers.
(save_fpregs_<mode>): Ditto
(restore_gpregs_<mode>): Ditto
(return_and_restore_gpregs_<mode>): Ditto
(return_and_restore_fpregs_<mode>): Ditto
(return_and_restore_fpregs_aix_<mode>): Ditto
From-SVN: r174997
This commit is contained in:
David Edelsohn
parent
8b160d504a
commit
a45fe02fe7
@ -1,3 +1,20 @@
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2011-06-13 David Edelsohn <dje.gcc@gmail.com>
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* config/rs6000/rs6000.md (movdi_mfpgpr): Remove POWER mnemonic.
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(movdi_internal64): Same.
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2011-06-13 Edmar Wienskoski <edmar@freescale.com>
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* config/rs6000/rs6000.md (save_gpregs_<mode>): Replaced pattern
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with a set of similar patterns, where the MATCH_OPERAND for the
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function argument is replaced with individual references to hardware
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registers.
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(save_fpregs_<mode>): Ditto
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(restore_gpregs_<mode>): Ditto
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(return_and_restore_gpregs_<mode>): Ditto
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(return_and_restore_fpregs_<mode>): Ditto
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(return_and_restore_fpregs_aix_<mode>): Ditto
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2011-06-13 Jan Hubicka <jh@suse.cz>
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* ipa-utils.c (postorder_stack): New structure.
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@ -10133,7 +10133,7 @@
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li %0,%1
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lis %0,%v1
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#
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{cal|la} %0,%a1
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la %0,%a1
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fmr %0,%1
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lfd%U1%X1 %0,%1
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stfd%U0%X0 %1,%0
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@ -10158,7 +10158,7 @@
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li %0,%1
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lis %0,%v1
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#
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{cal|la} %0,%a1
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la %0,%a1
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fmr %0,%1
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lfd%U1%X1 %0,%1
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stfd%U0%X0 %1,%0
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@ -15889,25 +15889,88 @@
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"{stm|stmw} %2,%1"
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[(set_attr "type" "store_ux")])
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(define_insn "*save_gpregs_<mode>"
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; The following comment applies to:
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; save_gpregs_*
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; save_fpregs_*
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; restore_gpregs*
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; return_and_restore_gpregs*
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; return_and_restore_fpregs*
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; return_and_restore_fpregs_aix*
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;
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; The out-of-line save / restore functions expects one input argument.
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; Since those are not standard call_insn's, we must avoid using
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; MATCH_OPERAND for that argument. That way the register rename
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; optimization will not try to rename this register.
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; Each pattern is repeated for each possible register number used in
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; various ABIs (r11, r1, and for some functions r12)
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(define_insn "*save_gpregs_<mode>_r11"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (reg:P 65))
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(use (match_operand:P 1 "symbol_ref_operand" "s"))
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(use (match_operand:P 2 "gpc_reg_operand" "r"))
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(set (match_operand:P 3 "memory_operand" "=m")
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(match_operand:P 4 "gpc_reg_operand" "r"))])]
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(use (reg:P 11))
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(set (match_operand:P 2 "memory_operand" "=m")
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(match_operand:P 3 "gpc_reg_operand" "r"))])]
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""
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"bl %1"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*save_fpregs_<mode>"
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(define_insn "*save_gpregs_<mode>_r12"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (reg:P 65))
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(use (match_operand:P 1 "symbol_ref_operand" "s"))
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(use (match_operand:P 2 "gpc_reg_operand" "r"))
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(set (match_operand:DF 3 "memory_operand" "=m")
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(match_operand:DF 4 "gpc_reg_operand" "d"))])]
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(use (reg:P 12))
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(set (match_operand:P 2 "memory_operand" "=m")
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(match_operand:P 3 "gpc_reg_operand" "r"))])]
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""
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"bl %1"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*save_gpregs_<mode>_r1"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (reg:P 65))
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(use (match_operand:P 1 "symbol_ref_operand" "s"))
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(use (reg:P 1))
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(set (match_operand:P 2 "memory_operand" "=m")
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(match_operand:P 3 "gpc_reg_operand" "r"))])]
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""
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"bl %1"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*save_fpregs_<mode>_r11"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (reg:P 65))
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(use (match_operand:P 1 "symbol_ref_operand" "s"))
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(use (reg:P 11))
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(set (match_operand:DF 2 "memory_operand" "=m")
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(match_operand:DF 3 "gpc_reg_operand" "d"))])]
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""
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"bl %1"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*save_fpregs_<mode>_r12"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (reg:P 65))
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(use (match_operand:P 1 "symbol_ref_operand" "s"))
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(use (reg:P 12))
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(set (match_operand:DF 2 "memory_operand" "=m")
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(match_operand:DF 3 "gpc_reg_operand" "d"))])]
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""
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"bl %1"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*save_fpregs_<mode>_r1"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (reg:P 65))
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(use (match_operand:P 1 "symbol_ref_operand" "s"))
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(use (reg:P 1))
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(set (match_operand:DF 2 "memory_operand" "=m")
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(match_operand:DF 3 "gpc_reg_operand" "d"))])]
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""
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"bl %1"
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[(set_attr "type" "branch")
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@ -16005,52 +16068,156 @@
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; FIXME: This would probably be somewhat simpler if the Cygnus sibcall
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; stuff was in GCC. Oh, and "any_parallel_operand" is a bit flexible...
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(define_insn "*restore_gpregs_<mode>"
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; The following comment applies to:
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; save_gpregs_*
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; save_fpregs_*
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; restore_gpregs*
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; return_and_restore_gpregs*
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; return_and_restore_fpregs*
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; return_and_restore_fpregs_aix*
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;
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; The out-of-line save / restore functions expects one input argument.
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; Since those are not standard call_insn's, we must avoid using
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; MATCH_OPERAND for that argument. That way the register rename
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; optimization will not try to rename this register.
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; Each pattern is repeated for each possible register number used in
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; various ABIs (r11, r1, and for some functions r12)
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(define_insn "*restore_gpregs_<mode>_r11"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (match_operand:P 3 "gpc_reg_operand" "r"))
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(set (match_operand:P 4 "gpc_reg_operand" "=r")
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(match_operand:P 5 "memory_operand" "m"))])]
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(use (reg:P 11))
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(set (match_operand:P 3 "gpc_reg_operand" "=r")
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(match_operand:P 4 "memory_operand" "m"))])]
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""
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"bl %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_gpregs_<mode>"
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(define_insn "*restore_gpregs_<mode>_r12"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (reg:P 12))
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(set (match_operand:P 3 "gpc_reg_operand" "=r")
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(match_operand:P 4 "memory_operand" "m"))])]
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""
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"bl %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*restore_gpregs_<mode>_r1"
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[(match_parallel 0 "any_parallel_operand"
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[(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (reg:P 1))
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(set (match_operand:P 3 "gpc_reg_operand" "=r")
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(match_operand:P 4 "memory_operand" "m"))])]
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""
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"bl %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_gpregs_<mode>_r11"
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[(match_parallel 0 "any_parallel_operand"
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[(return)
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(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (match_operand:P 3 "gpc_reg_operand" "r"))
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(set (match_operand:P 4 "gpc_reg_operand" "=r")
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(match_operand:P 5 "memory_operand" "m"))])]
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(use (reg:P 11))
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(set (match_operand:P 3 "gpc_reg_operand" "=r")
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(match_operand:P 4 "memory_operand" "m"))])]
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""
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"b %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_fpregs_<mode>"
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(define_insn "*return_and_restore_gpregs_<mode>_r12"
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[(match_parallel 0 "any_parallel_operand"
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[(return)
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(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (match_operand:P 3 "gpc_reg_operand" "r"))
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(set (match_operand:DF 4 "gpc_reg_operand" "=d")
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(match_operand:DF 5 "memory_operand" "m"))])]
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(use (reg:P 12))
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(set (match_operand:P 3 "gpc_reg_operand" "=r")
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(match_operand:P 4 "memory_operand" "m"))])]
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""
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"b %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_fpregs_aix_<mode>"
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(define_insn "*return_and_restore_gpregs_<mode>_r1"
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[(match_parallel 0 "any_parallel_operand"
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[(return)
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(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (reg:P 1))
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(set (match_operand:P 3 "gpc_reg_operand" "=r")
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(match_operand:P 4 "memory_operand" "m"))])]
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""
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"b %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_fpregs_<mode>_r11"
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[(match_parallel 0 "any_parallel_operand"
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[(return)
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(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (reg:P 11))
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(set (match_operand:DF 3 "gpc_reg_operand" "=d")
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(match_operand:DF 4 "memory_operand" "m"))])]
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""
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"b %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_fpregs_<mode>_r12"
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[(match_parallel 0 "any_parallel_operand"
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[(return)
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(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (reg:P 12))
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(set (match_operand:DF 3 "gpc_reg_operand" "=d")
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(match_operand:DF 4 "memory_operand" "m"))])]
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""
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"b %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_fpregs_<mode>_r1"
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[(match_parallel 0 "any_parallel_operand"
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[(return)
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(clobber (match_operand:P 1 "register_operand" "=l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (reg:P 1))
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(set (match_operand:DF 3 "gpc_reg_operand" "=d")
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(match_operand:DF 4 "memory_operand" "m"))])]
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""
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"b %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_fpregs_aix_<mode>_r11"
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[(match_parallel 0 "any_parallel_operand"
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[(return)
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(use (match_operand:P 1 "register_operand" "l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (match_operand:P 3 "gpc_reg_operand" "r"))
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(set (match_operand:DF 4 "gpc_reg_operand" "=d")
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(match_operand:DF 5 "memory_operand" "m"))])]
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(use (reg:P 11))
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(set (match_operand:DF 3 "gpc_reg_operand" "=d")
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(match_operand:DF 4 "memory_operand" "m"))])]
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""
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"b %2"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn "*return_and_restore_fpregs_aix_<mode>_r1"
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[(match_parallel 0 "any_parallel_operand"
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[(return)
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(use (match_operand:P 1 "register_operand" "l"))
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(use (match_operand:P 2 "symbol_ref_operand" "s"))
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(use (reg:P 1))
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(set (match_operand:DF 3 "gpc_reg_operand" "=d")
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(match_operand:DF 4 "memory_operand" "m"))])]
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""
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"b %2"
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[(set_attr "type" "branch")
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