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re PR target/33755 (Gcc 4.2.2 broken for mips linux kernel builds)
gcc/ PR target/33755 * config/mips/mips.c (mips_lo_sum_offset): New structure. (mips_hash_base, mips_lo_sum_offset_hash, mips_lo_sum_offset_eq) (mips_lo_sum_offset_lookup, mips_record_lo_sum) (mips_orphaned_high_part_p: New functions. (mips_avoid_hazard): Don't check INSN_P here. (mips_avoid_hazards): Rename to... (mips_reorg_process_insns): ...this. Cope with !TARGET_EXPLICIT_RELOCS. Delete orphaned high-part relocations, or turn them into nops. (mips_reorg): Remove TARGET_EXPLICIT_RELOCS check from calls to dbr_schedule and mips_avoid_hazards/mips_reorg_process_insns. (mips_set_mips16_mode): Don't set flag_delayed_branch here. (mips_override_options): Set flag_delayed_branch to 0. gcc/testsuite/ PR target/33755 * gcc.target/mips/pr33755.c: New test. From-SVN: r129606
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
a1c6b246b5
commit
a35de34276
@ -1,3 +1,20 @@
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2007-10-24 Richard Sandiford <rsandifo@nildram.co.uk>
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PR target/33755
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* config/mips/mips.c (mips_lo_sum_offset): New structure.
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(mips_hash_base, mips_lo_sum_offset_hash, mips_lo_sum_offset_eq)
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(mips_lo_sum_offset_lookup, mips_record_lo_sum)
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(mips_orphaned_high_part_p: New functions.
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(mips_avoid_hazard): Don't check INSN_P here.
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(mips_avoid_hazards): Rename to...
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(mips_reorg_process_insns): ...this. Cope with
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!TARGET_EXPLICIT_RELOCS. Delete orphaned high-part relocations,
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or turn them into nops.
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(mips_reorg): Remove TARGET_EXPLICIT_RELOCS check from calls to
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dbr_schedule and mips_avoid_hazards/mips_reorg_process_insns.
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(mips_set_mips16_mode): Don't set flag_delayed_branch here.
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(mips_override_options): Set flag_delayed_branch to 0.
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2007-10-24 Richard Sandiford <rsandifo@nildram.co.uk>
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* config/mips/mips.h (MOVE_MAX): Use UNITS_PER_WORD and describe
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@ -11183,8 +11183,122 @@ vr4130_align_insns (void)
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dfa_finish ();
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}
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/* Subroutine of mips_reorg. If there is a hazard between INSN
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and a previous instruction, avoid it by inserting nops after
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/* This structure records that the current function has a LO_SUM
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involving SYMBOL_REF or LABEL_REF BASE and that MAX_OFFSET is
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the largest offset applied to BASE by all such LO_SUMs. */
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struct mips_lo_sum_offset {
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rtx base;
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HOST_WIDE_INT offset;
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};
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/* Return a hash value for SYMBOL_REF or LABEL_REF BASE. */
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static hashval_t
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mips_hash_base (rtx base)
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{
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int do_not_record_p;
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return hash_rtx (base, GET_MODE (base), &do_not_record_p, NULL, false);
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}
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/* Hash-table callbacks for mips_lo_sum_offsets. */
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static hashval_t
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mips_lo_sum_offset_hash (const void *entry)
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{
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return mips_hash_base (((const struct mips_lo_sum_offset *) entry)->base);
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}
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static int
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mips_lo_sum_offset_eq (const void *entry, const void *value)
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{
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return rtx_equal_p (((const struct mips_lo_sum_offset *) entry)->base,
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(const_rtx) value);
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}
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/* Look up symbolic constant X in HTAB, which is a hash table of
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mips_lo_sum_offsets. If OPTION is NO_INSERT, return true if X can be
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paired with a recorded LO_SUM, otherwise record X in the table. */
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static bool
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mips_lo_sum_offset_lookup (htab_t htab, rtx x, enum insert_option option)
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{
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rtx base, offset;
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void **slot;
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struct mips_lo_sum_offset *entry;
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/* Split X into a base and offset. */
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split_const (x, &base, &offset);
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if (UNSPEC_ADDRESS_P (base))
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base = UNSPEC_ADDRESS (base);
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/* Look up the base in the hash table. */
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slot = htab_find_slot_with_hash (htab, base, mips_hash_base (base), option);
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if (slot == NULL)
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return false;
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entry = (struct mips_lo_sum_offset *) *slot;
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if (option == INSERT)
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{
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if (entry == NULL)
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{
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entry = XNEW (struct mips_lo_sum_offset);
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entry->base = base;
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entry->offset = INTVAL (offset);
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*slot = entry;
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}
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else
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{
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if (INTVAL (offset) > entry->offset)
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entry->offset = INTVAL (offset);
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}
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}
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return INTVAL (offset) <= entry->offset;
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}
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/* A for_each_rtx callback for which DATA is a mips_lo_sum_offset hash table.
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Record every LO_SUM in *LOC. */
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static int
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mips_record_lo_sum (rtx *loc, void *data)
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{
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if (GET_CODE (*loc) == LO_SUM)
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mips_lo_sum_offset_lookup ((htab_t) data, XEXP (*loc, 1), INSERT);
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return 0;
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}
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/* Return true if INSN is a SET of an orphaned high-part relocation.
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HTAB is a hash table of mips_lo_sum_offsets that describes all the
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LO_SUMs in the current function. */
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static bool
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mips_orphaned_high_part_p (htab_t htab, rtx insn)
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{
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enum mips_symbol_type type;
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rtx x, set;
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set = single_set (insn);
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if (set)
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{
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/* Check for %his. */
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x = SET_SRC (set);
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if (GET_CODE (x) == HIGH
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&& absolute_symbolic_operand (XEXP (x, 0), VOIDmode))
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return !mips_lo_sum_offset_lookup (htab, XEXP (x, 0), NO_INSERT);
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/* Check for local %gots (and %got_pages, which is redundant but OK). */
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if (GET_CODE (x) == UNSPEC
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&& XINT (x, 1) == UNSPEC_LOAD_GOT
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&& mips_symbolic_constant_p (XVECEXP (x, 0, 1),
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SYMBOL_CONTEXT_LEA, &type)
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&& type == SYMBOL_GOTOFF_PAGE)
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return !mips_lo_sum_offset_lookup (htab, XVECEXP (x, 0, 1), NO_INSERT);
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}
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return false;
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}
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/* Subroutine of mips_reorg_process_insns. If there is a hazard between
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INSN and a previous instruction, avoid it by inserting nops after
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instruction AFTER.
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*DELAYED_REG and *HILO_DELAY describe the hazards that apply at
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@ -11205,9 +11319,6 @@ mips_avoid_hazard (rtx after, rtx insn, int *hilo_delay,
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rtx pattern, set;
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int nops, ninsns, hazard_set;
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if (!INSN_P (insn))
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return;
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pattern = PATTERN (insn);
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/* Do not put the whole function in .set noreorder if it contains
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@ -11267,14 +11378,16 @@ mips_avoid_hazard (rtx after, rtx insn, int *hilo_delay,
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}
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/* Go through the instruction stream and insert nops where necessary.
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See if the whole function can then be put into .set noreorder &
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.set nomacro. */
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Also delete any high-part relocations whose partnering low parts
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are now all dead. See if the whole function can then be put into
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.set noreorder and .set nomacro. */
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static void
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mips_avoid_hazards (void)
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mips_reorg_process_insns (void)
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{
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rtx insn, last_insn, lo_reg, delayed_reg;
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int hilo_delay, i;
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rtx insn, last_insn, subinsn, next_insn, lo_reg, delayed_reg;
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int hilo_delay;
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htab_t htab;
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/* Force all instructions to be split into their final form. */
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split_all_insns_noflow ();
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@ -11285,6 +11398,10 @@ mips_avoid_hazards (void)
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cfun->machine->all_noreorder_p = true;
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/* Code that doesn't use explicit relocs can't be ".set nomacro". */
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if (!TARGET_EXPLICIT_RELOCS)
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cfun->machine->all_noreorder_p = false;
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/* Profiled functions can't be all noreorder because the profiler
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support uses assembler macros. */
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if (current_function_profile)
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@ -11302,24 +11419,63 @@ mips_avoid_hazards (void)
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if (TARGET_FIX_VR4130 && !ISA_HAS_MACCHI)
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cfun->machine->all_noreorder_p = false;
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htab = htab_create (37, mips_lo_sum_offset_hash,
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mips_lo_sum_offset_eq, free);
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/* Make a first pass over the instructions, recording all the LO_SUMs. */
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for (insn = get_insns (); insn != 0; insn = NEXT_INSN (insn))
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FOR_EACH_SUBINSN (subinsn, insn)
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if (INSN_P (subinsn))
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for_each_rtx (&PATTERN (subinsn), mips_record_lo_sum, htab);
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last_insn = 0;
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hilo_delay = 2;
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delayed_reg = 0;
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lo_reg = gen_rtx_REG (SImode, LO_REGNUM);
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for (insn = get_insns (); insn != 0; insn = NEXT_INSN (insn))
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if (INSN_P (insn))
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{
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if (GET_CODE (PATTERN (insn)) == SEQUENCE)
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for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
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mips_avoid_hazard (last_insn, XVECEXP (PATTERN (insn), 0, i),
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&hilo_delay, &delayed_reg, lo_reg);
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else
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mips_avoid_hazard (last_insn, insn, &hilo_delay,
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&delayed_reg, lo_reg);
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/* Make a second pass over the instructions. Delete orphaned
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high-part relocations or turn them into NOPs. Avoid hazards
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by inserting NOPs. */
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for (insn = get_insns (); insn != 0; insn = next_insn)
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{
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next_insn = NEXT_INSN (insn);
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if (INSN_P (insn))
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{
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if (GET_CODE (PATTERN (insn)) == SEQUENCE)
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{
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/* If we find an orphaned high-part relocation in a delay
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slot, it's easier to turn that instruction into a NOP than
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to delete it. The delay slot will be a NOP either way. */
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FOR_EACH_SUBINSN (subinsn, insn)
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if (INSN_P (subinsn))
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{
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if (mips_orphaned_high_part_p (htab, subinsn))
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{
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PATTERN (subinsn) = gen_nop ();
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INSN_CODE (subinsn) = CODE_FOR_nop;
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}
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mips_avoid_hazard (last_insn, subinsn, &hilo_delay,
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&delayed_reg, lo_reg);
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}
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last_insn = insn;
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}
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else
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{
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/* INSN is a single instruction. Delete it if it's an
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orphaned high-part relocation. */
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if (mips_orphaned_high_part_p (htab, insn))
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delete_insn (insn);
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else
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{
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mips_avoid_hazard (last_insn, insn, &hilo_delay,
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&delayed_reg, lo_reg);
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last_insn = insn;
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}
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}
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}
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}
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last_insn = insn;
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}
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htab_delete (htab);
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}
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/* Implement TARGET_MACHINE_DEPENDENT_REORG. */
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@ -11328,14 +11484,11 @@ static void
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mips_reorg (void)
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{
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mips16_lay_out_constants ();
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if (TARGET_EXPLICIT_RELOCS)
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{
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if (mips_base_delayed_branch)
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dbr_schedule (get_insns ());
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mips_avoid_hazards ();
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if (TUNE_MIPS4130 && TARGET_VR4130_ALIGN)
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vr4130_align_insns ();
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}
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if (mips_base_delayed_branch)
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dbr_schedule (get_insns ());
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mips_reorg_process_insns ();
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if (TARGET_EXPLICIT_RELOCS && TUNE_MIPS4130 && TARGET_VR4130_ALIGN)
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vr4130_align_insns ();
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}
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/* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text
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@ -11481,7 +11634,6 @@ mips_set_mips16_mode (int mips16_p)
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/* Restore base settings of various flags. */
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target_flags = mips_base_target_flags;
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flag_delayed_branch = mips_base_delayed_branch;
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flag_schedule_insns = mips_base_schedule_insns;
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flag_reorder_blocks_and_partition = mips_base_reorder_blocks_and_partition;
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flag_move_loop_invariants = mips_base_move_loop_invariants;
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@ -11534,11 +11686,6 @@ mips_set_mips16_mode (int mips16_p)
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/* Switch to normal (non-MIPS16) mode. */
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target_flags &= ~MASK_MIPS16;
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/* When using explicit relocs, we call dbr_schedule from within
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mips_reorg. */
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if (TARGET_EXPLICIT_RELOCS)
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flag_delayed_branch = 0;
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/* Provide default values for align_* for 64-bit targets. */
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if (TARGET_64BIT)
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{
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@ -12063,6 +12210,9 @@ mips_override_options (void)
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/* Now select the ISA mode. */
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mips_set_mips16_mode (mips_base_mips16);
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/* We call dbr_schedule from within mips_reorg. */
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flag_delayed_branch = 0;
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}
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/* Swap the register information for registers I and I + 1, which
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@ -1,3 +1,8 @@
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2007-10-24 Richard Sandiford <rsandifo@nildram.co.uk>
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PR target/33755
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* gcc.target/mips/pr33755.c: New test.
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2007-10-24 Ira Rosen <irar@il.ibm.com>
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PR tree-optimization/33804
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30
gcc/testsuite/gcc.target/mips/pr33755.c
Normal file
30
gcc/testsuite/gcc.target/mips/pr33755.c
Normal file
@ -0,0 +1,30 @@
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/* { dg-do link } */
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/* { dg-mips-options "-O2" } */
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volatile int gv;
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const char *ptrs[2];
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void
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foo (volatile int *v, const char **ptrs)
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{
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switch (*v & 1)
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{
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case 0:
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ptrs[0] = 0;
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break;
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case 1:
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break;
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default:
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ptrs[1] = "Some text";
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break;
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}
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while (*v > 0)
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*v -= 1;
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}
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int
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main (void)
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{
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foo (&gv, ptrs);
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return 0;
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}
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