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libitm: PowerPC support.
* configure.tgt: Support powerpc-linux and powerpc-darwin. * config/linux/powerpc/futex_bits.h: New file. * config/powerpc/cacheline.h: New file. * config/powerpc/sjlj.S: New file. * config/powerpc/target.h: New file. * config/generic/asmcfi.h (cfi_offset): New. (cfi_restore, cfi_undefined): New. From-SVN: r182930
This commit is contained in:
Richard Henderson
Richard Henderson
parent
003e0ad601
commit
a32e5e9357
@ -1,3 +1,13 @@
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2012-01-06 Richard Henderson <rth@redhat.com>
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* configure.tgt: Support powerpc-linux and powerpc-darwin.
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* config/linux/powerpc/futex_bits.h: New file.
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* config/powerpc/cacheline.h: New file.
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* config/powerpc/sjlj.S: New file.
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* config/powerpc/target.h: New file.
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* config/generic/asmcfi.h (cfi_offset): New.
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(cfi_restore, cfi_undefined): New.
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2012-01-05 Aldy Hernandez <aldyh@redhat.com>
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PR other/51171
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@ -1,5 +1,4 @@
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/* Copyright (C) 2011 Free Software Foundation, Inc.
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/* Copyright (C) 2011, 2012 Free Software Foundation, Inc.
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Contributed by Richard Henderson <rth@redhat.com>.
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This file is part of the GNU Transactional Memory Library (libitm).
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@ -34,6 +33,9 @@
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#define cfi_def_cfa(r,n) .cfi_def_cfa r, n
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#define cfi_rel_offset(r,o) .cfi_rel_offset r, o
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#define cfi_register(o,n) .cfi_register o, n
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#define cfi_offset(r,o) .cfi_offset r, o
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#define cfi_restore(r) .cfi_restore r
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#define cfi_undefined(r) .cfi_undefined r
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#else
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@ -44,5 +46,8 @@
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#define cfi_def_cfa(r,n)
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#define cfi_rel_offset(r,o)
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#define cfi_register(o,n)
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#define cfi_offset(r,o)
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#define cfi_restore(r)
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#define cfi_undefined(r)
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#endif /* HAVE_AS_CFI_PSEUDO_OP */
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54
libitm/config/linux/powerpc/futex_bits.h
Normal file
54
libitm/config/linux/powerpc/futex_bits.h
Normal file
@ -0,0 +1,54 @@
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/* Copyright (C) 2012 Free Software Foundation, Inc.
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Contributed by Richard Henderson <rth@redhat.com>.
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This file is part of the GNU Transactional Memory Library (libitm).
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Libitm is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sys/syscall.h>
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static inline long
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sys_futex0 (std::atomic<int> *addr, int op, int val)
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{
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register long int r0 __asm__ ("r0");
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register long int r3 __asm__ ("r3");
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register long int r4 __asm__ ("r4");
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register long int r5 __asm__ ("r5");
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register long int r6 __asm__ ("r6");
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r0 = SYS_futex;
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r3 = (long) addr;
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r4 = op;
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r5 = val;
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r6 = 0;
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/* ??? The powerpc64 sysdep.h file clobbers ctr; the powerpc32 sysdep.h
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doesn't. It doesn't much matter for us. In the interest of unity,
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go ahead and clobber it always. */
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__asm volatile ("sc; mfcr %0"
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: "=r"(r0), "=r"(r3), "=r"(r4), "=r"(r5), "=r"(r6)
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: "r"(r0), "r"(r3), "r"(r4), "r"(r5), "r"(r6)
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: "r7", "r8", "r9", "r10", "r11", "r12",
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"cr0", "ctr", "memory");
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if (__builtin_expect (r0 & (1 << 28), 0))
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return r3;
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return 0;
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}
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42
libitm/config/powerpc/cacheline.h
Normal file
42
libitm/config/powerpc/cacheline.h
Normal file
@ -0,0 +1,42 @@
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/* Copyright (C) 2012 Free Software Foundation, Inc.
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Contributed by Richard Henderson <rth@redhat.com>.
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This file is part of the GNU Transactional Memory Library (libitm).
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Libitm is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef LIBITM_POWERPC_CACHELINE_H
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#define LIBITM_POWERPC_CACHELINE_H 1
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// A cacheline is the smallest unit with which locks are associated.
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// The current implementation of the _ITM_[RW] barriers assumes that
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// all data types can fit (aligned) within a cachline, which means
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// in practice sizeof(complex long double) is the smallest cacheline size.
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// It ought to be small enough for efficient manipulation of the
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// modification mask, below.
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#if defined (__powerpc64__) || defined (__ppc64__)
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# define CACHELINE_SIZE 64
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#else
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# define CACHELINE_SIZE 32
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#endif
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#include "config/generic/cacheline.h"
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#endif // LIBITM_POWERPC_CACHELINE_H
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411
libitm/config/powerpc/sjlj.S
Normal file
411
libitm/config/powerpc/sjlj.S
Normal file
@ -0,0 +1,411 @@
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/* Copyright (C) 2012 Free Software Foundation, Inc.
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Contributed by Richard Henderson <rth@redhat.com>.
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This file is part of the GNU Transactional Memory Library (libitm).
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Libitm is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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.text
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#include "asmcfi.h"
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#if defined(__powerpc64__) && defined(__ELF__)
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.macro FUNC name
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.globl \name, .\name
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.section ".opd","aw"
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.align 3
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\name:
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.quad .\name, .TOC.@tocbase, 0
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.size \name, 24
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.type .\name, @function
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.text
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.\name:
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.endm
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.macro END name
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.size .\name, . - .\name
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.endm
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.macro HIDDEN name
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.hidden \name, .\name
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.endm
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.macro CALL name
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bl \name
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nop
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.endm
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#elif defined(__ELF__)
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.macro FUNC name
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.globl \name
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.type \name, @function
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\name:
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.endm
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.macro END name
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.size \name, . - \name
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.endm
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.macro HIDDEN name
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.hidden \name
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.endm
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.macro CALL name
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bl \name
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.endm
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#elif defined(_CALL_DARWIN)
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.macro FUNC name
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.globl _$0
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_$0:
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.endmacro
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.macro END name
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.endmacro
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.macro HIDDEN name
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.private_extern _$0
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.endmacro
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.macro CALL name
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bl _$0
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.endmacro
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# ifdef __ppc64__
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.machine ppc64
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# else
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.machine ppc7400
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# endif
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#else
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#error "unsupported system"
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#endif
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/* Parameterize the naming of registers. */
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#if defined(__ELF__)
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# define r(N) %r##N
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# define f(N) %f##N
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# define v(N) %v##N
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#elif defined(__MACH__)
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# define r(N) r##N
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# define f(N) f##N
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# define v(N) v##N
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#else
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# define r(N) N
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# define f(N) N
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# define v(N) N
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#endif
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/* Parameterize the code for 32-bit vs 64-bit. */
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#if defined(__powerpc64__) || defined(__ppc64__)
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#define ldreg ld
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#define streg std
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#define stregu stdu
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#define WS 8
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#else
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#define ldreg lwz
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#define streg stw
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#define stregu stwu
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#define WS 4
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#endif
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/* Parameterize the code for call frame constants. */
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#if defined(_CALL_AIXDESC)
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# define BASE 6*WS
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# define LR_SAVE 2*WS
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#elif defined(_CALL_SYSV)
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# define BASE 2*WS
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# define LR_SAVE 1*WS
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#elif defined(_CALL_DARWIN)
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# define BASE (6*WS + 2*WS)
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# define LR_SAVE 2*WS
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#else
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# error "unsupported system"
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#endif
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#if defined(__ALTIVEC__) || defined(__VSX__)
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# define OFS_VR 0
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# define OFS_VSCR 12*16
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# define OFS_VR_END OFS_VSCR + 8
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#else
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# define OFS_VR_END 0
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#endif
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#ifndef _SOFT_FLOAT
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# define OFS_FR OFS_VR_END
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# define OFS_FPSCR OFS_FR + 18*8
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# define OFS_FR_END OFS_FPSCR + 8
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#else
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# define OFS_FR_END OFS_VR_END
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#endif
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#define OFS_GR OFS_FR_END
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#define OFS_CFA OFS_GR + 18*WS
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#define OFS_LR OFS_CFA + WS
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#define OFS_TOC OFS_LR + WS
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#define OFS_CR OFS_TOC + WS
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#define OFS_END (((OFS_CR + WS + 15) / 16) * 16)
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#define FRAME (((BASE + OFS_END + 15) / 16) * 16)
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#define VRSAVE 256
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.align 4
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FUNC _ITM_beginTransaction
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cfi_startproc
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mflr r(0)
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mfcr r(5)
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addi r(4), r(1), -OFS_END
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mr r(6), r(1)
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streg r(0), LR_SAVE(r(1))
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stregu r(1), -FRAME(r(1))
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cfi_def_cfa_offset(FRAME)
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cfi_offset(65, LR_SAVE)
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streg r(6), OFS_CFA(r(4))
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streg r(0), OFS_LR(r(4))
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#ifdef _CALL_DARWIN
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streg r(13), OFS_TOC(r(4))
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#else
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streg r(2), OFS_TOC(r(4))
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#endif
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streg r(5), OFS_CR(r(4))
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streg r(14), 0*WS+OFS_GR(r(4))
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streg r(15), 1*WS+OFS_GR(r(4))
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streg r(16), 2*WS+OFS_GR(r(4))
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streg r(17), 3*WS+OFS_GR(r(4))
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streg r(18), 4*WS+OFS_GR(r(4))
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streg r(19), 5*WS+OFS_GR(r(4))
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streg r(20), 6*WS+OFS_GR(r(4))
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streg r(21), 7*WS+OFS_GR(r(4))
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streg r(22), 8*WS+OFS_GR(r(4))
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streg r(23), 9*WS+OFS_GR(r(4))
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streg r(24), 10*WS+OFS_GR(r(4))
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streg r(25), 11*WS+OFS_GR(r(4))
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streg r(26), 12*WS+OFS_GR(r(4))
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streg r(27), 13*WS+OFS_GR(r(4))
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streg r(28), 14*WS+OFS_GR(r(4))
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streg r(29), 15*WS+OFS_GR(r(4))
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streg r(30), 16*WS+OFS_GR(r(4))
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streg r(31), 17*WS+OFS_GR(r(4))
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#ifndef _SOFT_FLOAT
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/* ??? Determine when FPRs not present. */
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/* ??? Test r(3) for pr_hasNoFloatUpdate and skip the fp save.
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This is not yet set by the compiler. */
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mffs f(0)
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stfd f(14), 0+OFS_FR(r(4))
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stfd f(15), 8+OFS_FR(r(4))
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stfd f(16), 16+OFS_FR(r(4))
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stfd f(17), 24+OFS_FR(r(4))
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stfd f(18), 32+OFS_FR(r(4))
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stfd f(19), 40+OFS_FR(r(4))
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stfd f(20), 48+OFS_FR(r(4))
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stfd f(21), 56+OFS_FR(r(4))
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stfd f(22), 64+OFS_FR(r(4))
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stfd f(23), 72+OFS_FR(r(4))
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stfd f(24), 80+OFS_FR(r(4))
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stfd f(25), 88+OFS_FR(r(4))
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stfd f(26), 96+OFS_FR(r(4))
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stfd f(27),104+OFS_FR(r(4))
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stfd f(28),112+OFS_FR(r(4))
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stfd f(29),120+OFS_FR(r(4))
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stfd f(30),128+OFS_FR(r(4))
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stfd f(31),136+OFS_FR(r(4))
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stfd f(0), OFS_FPSCR(r(4))
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#endif
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||||
|
||||
#if defined(__ALTIVEC__)
|
||||
/* ??? Determine when VRs not present. */
|
||||
/* ??? Test r(3) for pr_hasNoVectorUpdate and skip the vr save.
|
||||
This is not yet set by the compiler. */
|
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addi r(5), r(4), OFS_VR
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addi r(6), r(4), OFS_VR+16
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mfspr r(0), VRSAVE
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stvx v(20), 0, r(5)
|
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addi r(5), r(5), 32
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||||
stvx v(21), 0, r(6)
|
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addi r(6), r(6), 32
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stvx v(22), 0, r(5)
|
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addi r(5), r(5), 32
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||||
stvx v(23), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
stvx v(25), 0, r(5)
|
||||
addi r(5), r(5), 32
|
||||
stvx v(26), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
stvx v(26), 0, r(5)
|
||||
addi r(5), r(5), 32
|
||||
stvx v(27), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
stvx v(28), 0, r(5)
|
||||
addi r(5), r(5), 32
|
||||
stvx v(29), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
stvx v(30), 0, r(5)
|
||||
stvx v(31), 0, r(6)
|
||||
streg r(0), OFS_VSCR(r(4))
|
||||
#endif
|
||||
|
||||
CALL GTM_begin_transaction
|
||||
|
||||
ldreg r(0), LR_SAVE+FRAME(r(1))
|
||||
mtlr r(0)
|
||||
addi r(1), r(1), FRAME
|
||||
cfi_def_cfa_offset(0)
|
||||
cfi_restore(65)
|
||||
blr
|
||||
cfi_endproc
|
||||
END _ITM_beginTransaction
|
||||
|
||||
.align 4
|
||||
HIDDEN GTM_longjmp
|
||||
FUNC GTM_longjmp
|
||||
cfi_startproc
|
||||
#if defined(__ALTIVEC__) || defined(__VSX__)
|
||||
/* ??? Determine when VRs not present. */
|
||||
/* ??? Test r(5) for pr_hasNoVectorUpdate and skip the vr restore.
|
||||
This is not yet set by the compiler. */
|
||||
addi r(6), r(4), OFS_VR
|
||||
addi r(7), r(4), OFS_VR+16
|
||||
ldreg r(0), OFS_VSCR(r(4))
|
||||
cfi_undefined(v(20))
|
||||
cfi_undefined(v(21))
|
||||
cfi_undefined(v(22))
|
||||
cfi_undefined(v(23))
|
||||
cfi_undefined(v(24))
|
||||
cfi_undefined(v(25))
|
||||
cfi_undefined(v(26))
|
||||
cfi_undefined(v(27))
|
||||
cfi_undefined(v(28))
|
||||
cfi_undefined(v(29))
|
||||
cfi_undefined(v(30))
|
||||
cfi_undefined(v(31))
|
||||
lvx v(20), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
lvx v(21), 0, r(7)
|
||||
addi r(7), r(7), 32
|
||||
lvx v(22), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
lvx v(23), 0, r(7)
|
||||
addi r(7), r(7), 32
|
||||
lvx v(24), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
lvx v(25), 0, r(7)
|
||||
addi r(7), r(7), 32
|
||||
lvx v(26), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
lvx v(27), 0, r(7)
|
||||
addi r(7), r(7), 32
|
||||
lvx v(28), 0, r(6)
|
||||
addi r(6), r(6), 32
|
||||
lvx v(29), 0, r(7)
|
||||
addi r(7), r(7), 32
|
||||
lvx v(30), 0, r(6)
|
||||
lvx v(31), 0, r(7)
|
||||
mtspr VRSAVE, r(0)
|
||||
#endif
|
||||
|
||||
#ifndef _SOFT_FLOAT
|
||||
/* ??? Determine when FPRs not present. */
|
||||
/* ??? Test r(5) for pr_hasNoFloatUpdate and skip the fp load.
|
||||
This is not yet set by the compiler. */
|
||||
lfd f(0), OFS_FPSCR(r(4))
|
||||
cfi_undefined(f(14))
|
||||
cfi_undefined(f(15))
|
||||
cfi_undefined(f(16))
|
||||
cfi_undefined(f(17))
|
||||
cfi_undefined(f(18))
|
||||
cfi_undefined(f(19))
|
||||
cfi_undefined(f(20))
|
||||
cfi_undefined(f(21))
|
||||
cfi_undefined(f(22))
|
||||
cfi_undefined(f(23))
|
||||
cfi_undefined(f(24))
|
||||
cfi_undefined(f(25))
|
||||
cfi_undefined(f(26))
|
||||
cfi_undefined(f(27))
|
||||
cfi_undefined(f(28))
|
||||
cfi_undefined(f(29))
|
||||
cfi_undefined(f(30))
|
||||
cfi_undefined(f(31))
|
||||
lfd f(14), 0+OFS_FR(r(4))
|
||||
lfd f(15), 8+OFS_FR(r(4))
|
||||
lfd f(16), 16+OFS_FR(r(4))
|
||||
lfd f(17), 24+OFS_FR(r(4))
|
||||
lfd f(18), 32+OFS_FR(r(4))
|
||||
lfd f(19), 40+OFS_FR(r(4))
|
||||
lfd f(20), 48+OFS_FR(r(4))
|
||||
lfd f(21), 56+OFS_FR(r(4))
|
||||
lfd f(22), 64+OFS_FR(r(4))
|
||||
lfd f(23), 72+OFS_FR(r(4))
|
||||
lfd f(24), 80+OFS_FR(r(4))
|
||||
lfd f(25), 88+OFS_FR(r(4))
|
||||
lfd f(26), 96+OFS_FR(r(4))
|
||||
lfd f(27),104+OFS_FR(r(4))
|
||||
lfd f(28),112+OFS_FR(r(4))
|
||||
lfd f(29),120+OFS_FR(r(4))
|
||||
lfd f(30),128+OFS_FR(r(4))
|
||||
lfd f(31),136+OFS_FR(r(4))
|
||||
mtfsf 0xff, f(0)
|
||||
#endif
|
||||
|
||||
ldreg r(6), OFS_CFA(r(4))
|
||||
ldreg r(0), OFS_LR(r(4))
|
||||
#ifdef _CALL_DARWIN
|
||||
ldreg r(13), OFS_TOC(r(4))
|
||||
#else
|
||||
ldreg r(2), OFS_TOC(r(4))
|
||||
#endif
|
||||
ldreg r(7), OFS_CR(r(4))
|
||||
/* At the instant we restore the LR, the only coherent view of
|
||||
the world we have is into the new stack frame. Define the
|
||||
CFA in terms of the not-yet-restored stack pointer. This will
|
||||
last until the end of the function. */
|
||||
mtlr r(0)
|
||||
cfi_def_cfa(r(6), 0)
|
||||
cfi_undefined(r(14))
|
||||
cfi_undefined(r(15))
|
||||
cfi_undefined(r(16))
|
||||
cfi_undefined(r(17))
|
||||
cfi_undefined(r(18))
|
||||
cfi_undefined(r(19))
|
||||
cfi_undefined(r(20))
|
||||
cfi_undefined(r(21))
|
||||
cfi_undefined(r(22))
|
||||
cfi_undefined(r(23))
|
||||
cfi_undefined(r(24))
|
||||
cfi_undefined(r(25))
|
||||
cfi_undefined(r(26))
|
||||
cfi_undefined(r(27))
|
||||
cfi_undefined(r(28))
|
||||
cfi_undefined(r(29))
|
||||
cfi_undefined(r(30))
|
||||
cfi_undefined(r(31))
|
||||
mtcr r(7)
|
||||
ldreg r(14), 0*WS+OFS_GR(r(4))
|
||||
ldreg r(15), 1*WS+OFS_GR(r(4))
|
||||
ldreg r(16), 2*WS+OFS_GR(r(4))
|
||||
ldreg r(17), 3*WS+OFS_GR(r(4))
|
||||
ldreg r(18), 4*WS+OFS_GR(r(4))
|
||||
ldreg r(19), 5*WS+OFS_GR(r(4))
|
||||
ldreg r(20), 6*WS+OFS_GR(r(4))
|
||||
ldreg r(21), 7*WS+OFS_GR(r(4))
|
||||
ldreg r(22), 8*WS+OFS_GR(r(4))
|
||||
ldreg r(23), 9*WS+OFS_GR(r(4))
|
||||
ldreg r(24), 10*WS+OFS_GR(r(4))
|
||||
ldreg r(25), 11*WS+OFS_GR(r(4))
|
||||
ldreg r(26), 12*WS+OFS_GR(r(4))
|
||||
ldreg r(27), 13*WS+OFS_GR(r(4))
|
||||
ldreg r(28), 14*WS+OFS_GR(r(4))
|
||||
ldreg r(29), 15*WS+OFS_GR(r(4))
|
||||
ldreg r(30), 16*WS+OFS_GR(r(4))
|
||||
ldreg r(31), 17*WS+OFS_GR(r(4))
|
||||
mr r(1), r(6)
|
||||
blr
|
||||
cfi_endproc
|
||||
END GTM_longjmp
|
||||
|
||||
#ifdef __linux__
|
||||
.section .note.GNU-stack, "", @progbits
|
||||
#endif
|
||||
58
libitm/config/powerpc/target.h
Normal file
58
libitm/config/powerpc/target.h
Normal file
@ -0,0 +1,58 @@
|
||||
/* Copyright (C) 2012 Free Software Foundation, Inc.
|
||||
Contributed by Richard Henderson <rth@redhat.com>.
|
||||
|
||||
This file is part of the GNU Transactional Memory Library (libitm).
|
||||
|
||||
Libitm is free software; you can redistribute it and/or modify it
|
||||
under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details.
|
||||
|
||||
Under Section 7 of GPL version 3, you are granted additional
|
||||
permissions described in the GCC Runtime Library Exception, version
|
||||
3.1, as published by the Free Software Foundation.
|
||||
|
||||
You should have received a copy of the GNU General Public License and
|
||||
a copy of the GCC Runtime Library Exception along with this program;
|
||||
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
namespace GTM HIDDEN {
|
||||
|
||||
typedef int v128 __attribute__((vector_size(16), may_alias, aligned(16)));
|
||||
typedef struct gtm_jmpbuf
|
||||
{
|
||||
#if defined(__ALTIVEC__) || defined(__VSX__)
|
||||
v128 vr[12]; /* vr20-vr31 */
|
||||
unsigned long long vscr; /* long long for padding only */
|
||||
#endif
|
||||
#ifndef _SOFT_FLOAT
|
||||
double fr[18]; /* f14-f31 */
|
||||
double fpscr;
|
||||
#endif
|
||||
unsigned long gr[18]; /* r14-r31 */
|
||||
void *cfa;
|
||||
unsigned long pc;
|
||||
unsigned long toc; /* r2 on aix, r13 on darwin */
|
||||
unsigned long cr;
|
||||
} gtm_jmpbuf;
|
||||
|
||||
/* The size of one line in hardware caches (in bytes). */
|
||||
#if defined (__powerpc64__) || defined (__ppc64__)
|
||||
# define HW_CACHELINE_SIZE 128
|
||||
#else
|
||||
# define HW_CACHELINE_SIZE 32
|
||||
#endif
|
||||
|
||||
static inline void
|
||||
cpu_relax (void)
|
||||
{
|
||||
__asm volatile ("" : : : "memory");
|
||||
}
|
||||
|
||||
} // namespace GTM
|
||||
@ -1,5 +1,5 @@
|
||||
# -*- shell-script -*-
|
||||
# Copyright (C) 2011 Free Software Foundation, Inc.
|
||||
# Copyright (C) 2011, 2012 Free Software Foundation, Inc.
|
||||
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
@ -46,7 +46,8 @@ fi
|
||||
# Map the target cpu to an ARCH sub-directory. At the same time,
|
||||
# work out any special compilation flags as necessary.
|
||||
case "${target_cpu}" in
|
||||
alpha*) ARCH=alpha ;;
|
||||
alpha*) ARCH=alpha ;;
|
||||
rs6000 | powerpc*) ARCH=powerpc ;;
|
||||
|
||||
arm*) ARCH=arm ;;
|
||||
|
||||
@ -94,6 +95,11 @@ case "${target}" in
|
||||
fi
|
||||
;;
|
||||
|
||||
powerpc*-*-aix* | rs6000-*-aix*)
|
||||
# The system ought to be supported, but sjlj.S has not been ported.
|
||||
UNSUPPORTED=1
|
||||
;;
|
||||
|
||||
*-*-gnu* | *-*-k*bsd*-gnu \
|
||||
| *-*-netbsd* | *-*-freebsd* | *-*-openbsd* \
|
||||
| *-*-solaris2* | *-*-sysv4* | *-*-irix6* | *-*-osf* | *-*-hpux11* \
|
||||
|
||||
Loading…
Reference in New Issue
Block a user