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extend.texi (Function Attributes): Document the IA-64 version of the "model" attribute.
* doc/extend.texi (Function Attributes): Document the IA-64 version of the "model" attribute. * config/ia64/ia64.h (SYMBOL_FLAG_SMALL_ADDR): New macro. (SYMBOL_REF_SMALL_ADDR_P): Ditto. (PREDICATE_CODES): Mention "small_addr_symbolic_operand". * config/ia64/ia64.c (ia64_handle_model_attribute): New function. (ia64_encode_section_info): Likewise. (ia64_attribute_table): Add "model" attribute. (TARGET_ENCODE_SECTION_INFO): Define. (small_addr_symbolic_operand): New function. (got_symbolic_operand): Return 0 for a symbolref to an object in the small address area. (enum ia64_addr_area): New type. (small_ident1): New variable. (small_ident2): Likewise. (init_idents): New function. (ia64_get_addr_area): Likewise. (ia64_encode_addr_area): Likewise. (ia64_encode_section_info): Likewise. (ia64_expand_load_address): For symbolic references to objects in the small-address-area, load the address via gen_rtx_SET() (which, eventually, will expand into "addl"). From-SVN: r70209
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@ -1,3 +1,30 @@
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2003-08-06 David Mosberger <davidm@hpl.hp.com>
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* doc/extend.texi (Function Attributes): Document the IA-64 version
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of the "model" attribute.
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* config/ia64/ia64.h (SYMBOL_FLAG_SMALL_ADDR): New macro.
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(SYMBOL_REF_SMALL_ADDR_P): Ditto.
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(PREDICATE_CODES): Mention "small_addr_symbolic_operand".
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* config/ia64/ia64.c (ia64_handle_model_attribute): New function.
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(ia64_encode_section_info): Likewise.
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(ia64_attribute_table): Add "model" attribute.
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(TARGET_ENCODE_SECTION_INFO): Define.
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(small_addr_symbolic_operand): New function.
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(got_symbolic_operand): Return 0 for a symbolref to an object
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in the small address area.
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(enum ia64_addr_area): New type.
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(small_ident1): New variable.
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(small_ident2): Likewise.
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(init_idents): New function.
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(ia64_get_addr_area): Likewise.
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(ia64_encode_addr_area): Likewise.
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(ia64_encode_section_info): Likewise.
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(ia64_expand_load_address): For symbolic references to objects in
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the small-address-area, load the address via gen_rtx_SET() (which,
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eventually, will expand into "addl").
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2003-08-06 Per Bothner <pbothner@apple.com>
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* line-map.h (fileline): New typedef.
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@ -262,13 +262,17 @@ static void ia64_hpux_add_extern_decl PARAMS ((const char *name))
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static void ia64_hpux_file_end PARAMS ((void))
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ATTRIBUTE_UNUSED;
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static tree ia64_handle_model_attribute (tree *, tree, tree, int, bool *);
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static void ia64_encode_section_info (tree, rtx, int);
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/* Table of valid machine attributes. */
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static const struct attribute_spec ia64_attribute_table[] =
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{
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/* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
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{ "syscall_linkage", 0, 0, false, true, true, NULL },
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{ NULL, 0, 0, false, false, false, NULL }
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{ "model", 1, 1, true, false, false, ia64_handle_model_attribute },
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{ NULL, 0, 0, false, false, false, NULL }
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};
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/* Initialize the GCC target structure. */
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@ -368,6 +372,9 @@ static const struct attribute_spec ia64_attribute_table[] =
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#undef TARGET_MACHINE_DEPENDENT_REORG
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#define TARGET_MACHINE_DEPENDENT_REORG ia64_reorg
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#undef TARGET_ENCODE_SECTION_INFO
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#define TARGET_ENCODE_SECTION_INFO ia64_encode_section_info
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struct gcc_target targetm = TARGET_INITIALIZER;
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/* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
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@ -413,6 +420,12 @@ sdata_symbolic_operand (op, mode)
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return 0;
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}
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int
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small_addr_symbolic_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
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{
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return SYMBOL_REF_SMALL_ADDR_P (op);
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}
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/* Return 1 if OP refers to a symbol, and is appropriate for a GOT load. */
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int
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@ -449,6 +462,8 @@ got_symbolic_operand (op, mode)
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return (INTVAL (op) & 0x3fff) == 0;
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case SYMBOL_REF:
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if (SYMBOL_REF_SMALL_ADDR_P (op))
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return 0;
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case LABEL_REF:
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return 1;
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@ -1040,6 +1055,129 @@ basereg_operand (op, mode)
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REG_POINTER ((GET_CODE (op) == SUBREG) ? SUBREG_REG (op) : op));
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}
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typedef enum
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{
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ADDR_AREA_NORMAL, /* normal address area */
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ADDR_AREA_SMALL /* addressable by "addl" (-2MB < addr < 2MB) */
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}
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ia64_addr_area;
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static GTY(()) tree small_ident1;
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static GTY(()) tree small_ident2;
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static void
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init_idents (void)
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{
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if (small_ident1 == 0)
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{
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small_ident1 = get_identifier ("small");
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small_ident2 = get_identifier ("__small__");
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}
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}
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/* Retrieve the address area that has been chosen for the given decl. */
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static ia64_addr_area
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ia64_get_addr_area (tree decl)
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{
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tree model_attr;
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model_attr = lookup_attribute ("model", DECL_ATTRIBUTES (decl));
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if (model_attr)
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{
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tree id;
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init_idents ();
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id = TREE_VALUE (TREE_VALUE (model_attr));
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if (id == small_ident1 || id == small_ident2)
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return ADDR_AREA_SMALL;
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}
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return ADDR_AREA_NORMAL;
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}
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static tree
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ia64_handle_model_attribute (tree *node, tree name,
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tree args,
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int flags ATTRIBUTE_UNUSED,
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bool *no_add_attrs)
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{
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ia64_addr_area addr_area = ADDR_AREA_NORMAL;
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ia64_addr_area area;
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tree arg, decl = *node;
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init_idents ();
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arg = TREE_VALUE (args);
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if (arg == small_ident1 || arg == small_ident2)
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{
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addr_area = ADDR_AREA_SMALL;
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}
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else
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{
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warning ("invalid argument of `%s' attribute",
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IDENTIFIER_POINTER (name));
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*no_add_attrs = true;
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}
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switch (TREE_CODE (decl))
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{
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case VAR_DECL:
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if ((DECL_CONTEXT (decl) && TREE_CODE (DECL_CONTEXT (decl))
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== FUNCTION_DECL)
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&& !TREE_STATIC (decl))
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{
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error ("%Ha an address area attribute cannot be specified for "
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"local variables", &DECL_SOURCE_LOCATION (decl), decl);
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*no_add_attrs = true;
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}
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area = ia64_get_addr_area (decl);
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if (area != ADDR_AREA_NORMAL && addr_area != area)
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{
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error ("%Ha address area of '%s' conflicts with previous "
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"declaration", &DECL_SOURCE_LOCATION (decl), decl);
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*no_add_attrs = true;
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}
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break;
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case FUNCTION_DECL:
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error ("%Ha address area attribute cannot be specified for functions",
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&DECL_SOURCE_LOCATION (decl), decl);
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*no_add_attrs = true;
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break;
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default:
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warning ("`%s' attribute ignored", IDENTIFIER_POINTER (name));
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*no_add_attrs = true;
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break;
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}
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return NULL_TREE;
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}
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static void
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ia64_encode_addr_area (tree decl, rtx symbol)
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{
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int flags;
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flags = SYMBOL_REF_FLAGS (symbol);
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switch (ia64_get_addr_area (decl))
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{
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case ADDR_AREA_NORMAL: break;
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case ADDR_AREA_SMALL: flags |= SYMBOL_FLAG_SMALL_ADDR; break;
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default: abort ();
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}
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SYMBOL_REF_FLAGS (symbol) = flags;
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}
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static void
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ia64_encode_section_info (tree decl, rtx rtl, int first)
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{
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default_encode_section_info (decl, rtl, first);
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if (TREE_CODE (decl) == VAR_DECL
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&& (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
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ia64_encode_addr_area (decl, XEXP (rtl, 0));
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}
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/* Return 1 if the operands of a move are ok. */
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int
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@ -1114,7 +1252,12 @@ ia64_expand_load_address (dest, src)
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if (GET_MODE (dest) != Pmode)
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dest = gen_rtx_REG (Pmode, REGNO (dest));
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if (TARGET_AUTO_PIC)
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if (GET_CODE (src) == SYMBOL_REF && SYMBOL_REF_SMALL_ADDR_P (src))
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{
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emit_insn (gen_rtx_SET (VOIDmode, dest, src));
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return;
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}
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else if (TARGET_AUTO_PIC)
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{
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emit_insn (gen_load_gprel64 (dest, src));
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return;
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(GET_CODE (VALUE) == MEM \
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&& GET_RTX_CLASS (GET_CODE (XEXP ((VALUE), 0))) != 'a' \
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&& (reload_in_progress || memory_operand ((VALUE), VOIDmode)))
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/* Symbol ref to small-address-area: */
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#define CONSTRAINT_OK_FOR_T(VALUE) \
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(GET_CODE (VALUE) == SYMBOL_REF && SYMBOL_REF_SMALL_ADDR_P (VALUE))
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#define EXTRA_CONSTRAINT(VALUE, C) \
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((C) == 'Q' ? CONSTRAINT_OK_FOR_Q (VALUE) \
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: (C) == 'R' ? CONSTRAINT_OK_FOR_R (VALUE) \
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: (C) == 'S' ? CONSTRAINT_OK_FOR_S (VALUE) \
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: (C) == 'T' ? CONSTRAINT_OK_FOR_T (VALUE) \
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: 0)
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/* Basic Stack Layout */
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@ -2172,6 +2176,12 @@ do { \
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/* Miscellaneous Parameters. */
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/* Flag to mark data that is in the small address area (addressable
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via "addl", that is, within a 2MByte offset of 0. */
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#define SYMBOL_FLAG_SMALL_ADDR (SYMBOL_FLAG_MACH_DEP << 0)
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#define SYMBOL_REF_SMALL_ADDR_P(X) \
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((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SMALL_ADDR) != 0)
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/* Define this if you have defined special-purpose predicates in the file
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`MACHINE.c'. For each predicate, list all rtl codes that can be in
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expressions matched by the predicate. */
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@ -2180,6 +2190,7 @@ do { \
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{ "call_operand", {SUBREG, REG, SYMBOL_REF}}, \
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{ "got_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
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{ "sdata_symbolic_operand", {SYMBOL_REF, CONST}}, \
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{ "small_addr_symbolic_operand", {SYMBOL_REF}}, \
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{ "symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
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{ "function_operand", {SYMBOL_REF}}, \
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{ "setjmp_operand", {SYMBOL_REF}}, \
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[(set (match_operand:DI 0 "destination_operand"
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"=r,r,r,r, m, r,*f,*f,*f, Q, r,*b, r,*e, r,*d, r,*c")
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(match_operand:DI 1 "move_operand"
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"rO,J,i,m,rO,*f,rO,*f, Q,*f,*b,rO,*e,rK,*d,rK,*c,rO"))]
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"rO,JT,i,m,rO,*f,rO,*f, Q,*f,*b,rO,*e,rK,*d,rK,*c,rO"))]
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"ia64_move_ok (operands[0], operands[1])"
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{
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static const char * const alt[] = {
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@ -2540,10 +2540,12 @@ the compiler. It is up to the programmer to provide these sequences.
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@item model (@var{model-name})
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@cindex function addressability on the M32R/D
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Use this attribute on the M32R/D to set the addressability of an object,
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and of the code generated for a function.
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The identifier @var{model-name} is one of @code{small}, @code{medium},
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or @code{large}, representing each of the code models.
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@cindex variable addressability on the IA-64
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On the M32R/D, use this attribute to set the addressability of an
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object, and of the code generated for a function. The identifier
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@var{model-name} is one of @code{small}, @code{medium}, or
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@code{large}, representing each of the code models.
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Small model objects live in the lower 16MB of memory (so that their
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addresses can be loaded with the @code{ld24} instruction), and are
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@ -2558,6 +2560,14 @@ compiler will generate @code{seth/add3} instructions to load their addresses),
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and may not be reachable with the @code{bl} instruction (the compiler will
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generate the much slower @code{seth/add3/jl} instruction sequence).
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On IA-64, use this attribute to set the addressability of an object.
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At present, the only supported identifier for @var{model-name} is
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@code{small}, indicating addressability via ``small'' (22-bit)
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addresses (so that their addresses can be loaded with the @code{addl}
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instruction). Caveat: such addressing is by definition not position
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independent and hence this attribute must not be used for objects
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defined by shared libraries.
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@item far
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@cindex functions which handle memory bank switching
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On 68HC11 and 68HC12 the @code{far} attribute causes the compiler to
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