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ix86: Add peephole2 for *add<mode>3_cc_overflow_1 followed by matching memory store [PR94857]
The following peephole2 changes: - addl (%rdi), %esi + xorl %eax, %eax + addl %esi, (%rdi) setc %al - movl %esi, (%rdi) - movzbl %al, %eax ret on the testcase. *add<mode>3_cc_overflow_1, being an add{l,q} insn, is commutative, so if TARGET_READ_MODIFY_WRITE we can replace addl (%rdi), %esi; movl %esi, (%rdi) with addl %esi, (%rdi) if %esi is dead after those two insns. 2020-05-08 Jakub Jelinek <jakub@redhat.com> PR target/94857 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New define_peephole2. * gcc.target/i386/pr94857.c: New test.
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2020-05-08 Jakub Jelinek <jakub@redhat.com>
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PR target/94857
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* config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
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define_peephole2.
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PR middle-end/94724
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* tree.c (get_narrower): Reuse the op temporary instead of
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shadowing it.
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@ -6992,6 +6992,23 @@
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[(set_attr "type" "alu")
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(set_attr "mode" "<MODE>")])
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(define_peephole2
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[(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(plus:SWI (match_operand:SWI 0 "general_reg_operand")
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(match_operand:SWI 1 "memory_operand"))
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(match_dup 0)))
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(set (match_dup 0) (plus:SWI (match_dup 0) (match_dup 1)))])
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(set (match_dup 1) (match_dup 0))]
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"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
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&& peep2_reg_dead_p (2, operands[0])
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&& !reg_overlap_mentioned_p (operands[0], operands[1])"
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[(parallel [(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(plus:SWI (match_dup 1) (match_dup 0))
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(match_dup 1)))
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(set (match_dup 1) (plus:SWI (match_dup 1) (match_dup 0)))])])
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(define_insn "*addsi3_zext_cc_overflow_1"
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[(set (reg:CCC FLAGS_REG)
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(compare:CCC
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@ -1,5 +1,8 @@
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2020-05-08 Jakub Jelinek <jakub@redhat.com>
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PR target/94857
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* gcc.target/i386/pr94857.c: New test.
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PR tree-optimization/94783
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* gcc.dg/tree-ssa/pr94783.c: New test.
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gcc/testsuite/gcc.target/i386/pr94857.c
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gcc/testsuite/gcc.target/i386/pr94857.c
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/* PR target/94857 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -mtune=skylake -masm=att" } */
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/* { dg-additional-options "-mregparm=2" { target ia32 } } */
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/* { dg-final { scan-assembler "\taddl\t%\[a-z0-9]\*, \\\(" } } */
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int
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foo (unsigned *p, unsigned x)
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{
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unsigned u = *p;
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*p += x;
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return u > *p;
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}
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