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m68hc11.md ("extendhisi2"): Fix constraints to prefer a memory for operand 1.

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* config/m68hc11/m68hc11.md ("extendhisi2"): Fix constraints to
	prefer a memory for operand 1.
	("*addsi3"): Fix constraints, the '!' was too strong.
	("*addsi3_split"): Accept soft register and split accordingly.

From-SVN: r43137
This commit is contained in:
Stephane Carrez 2001-06-10 12:24:48 +02:00 committed by Stephane Carrez
parent 3bcda5fbce
commit 9eee2c76b8
2 changed files with 28 additions and 9 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2001-06-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/m68hc11/m68hc11.md ("extendhisi2"): Fix constraints to
prefer a memory for operand 1.
("*addsi3"): Fix constraints, the '!' was too strong.
("*addsi3_split"): Accept soft register and split accordingly.
2001-06-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/m68hc11/m68hc11-protos.h (m68hc11_initialize_trampoline):

30
gcc/config/m68hc11/m68hc11.md
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@ -1444,8 +1444,8 @@
"")
(define_insn "extendhisi2"
[(set (match_operand:SI 0 "register_operand" "=D,D")
(sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "dm,!uA")))]
[(set (match_operand:SI 0 "register_operand" "=D,D,D")
(sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "m,!r,0")))]
""
"*
{
@ -1776,9 +1776,9 @@
}")
(define_insn "*addsi3"
[(set (match_operand:SI 0 "non_push_operand" "=m,D,!u,D,!D")
[(set (match_operand:SI 0 "non_push_operand" "=m,D,!u,?D,D")
(plus:SI (match_operand:SI 1 "non_push_operand" "%0,0,0,0,0")
(match_operand:SI 2 "general_operand" "ML,i,L,?miu,!D")))
(match_operand:SI 2 "general_operand" "ML,i,ML,?D,?miu")))
(clobber (match_scratch:HI 3 "=d,X,d,X,X"))]
""
"*
@ -1878,14 +1878,26 @@
}")
(define_split
[(set (match_operand:SI 0 "register_operand" "=D")
(plus:SI (match_operand:SI 1 "register_operand" "%0")
[(set (match_operand:SI 0 "register_operand" "=D,u")
(plus:SI (match_operand:SI 1 "register_operand" "%0,0")
(match_operand:SI 2 "const_int_operand" "")))
(clobber (match_scratch:HI 3 "=X"))]
(clobber (match_scratch:HI 3 "=X,d"))]
"reload_completed && z_replacement_completed == 2
&& ((INTVAL (operands[2]) & 0x0FFFF) == 0)"
[(set (reg:HI X_REGNUM) (plus:HI (reg:HI X_REGNUM) (match_dup 3)))]
"operands[3] = m68hc11_gen_highpart (HImode, operands[2]);")
[(set (match_dup 5) (match_dup 6))
(set (reg:HI 0) (plus:HI (reg:HI 0) (match_dup 4)))
(set (match_dup 6) (match_dup 5))]
"operands[4] = m68hc11_gen_highpart (HImode, operands[2]);
if (X_REG_P (operands[0]))
{
operands[5] = operands[6] = gen_rtx (REG, HImode, HARD_D_REGNUM);
}
else
{
operands[6] = m68hc11_gen_highpart (HImode, operands[1]);
operands[5] = operands[3];
}
")
(define_split
[(set (match_operand:SI 0 "register_operand" "=D")