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defaults.h (UNITS_PER_SIMD_WORD): Add scalar mode as argument.
2008-05-22 H.J. Lu <hongjiu.lu@intel.com> * defaults.h (UNITS_PER_SIMD_WORD): Add scalar mode as argument. * doc/tm.texi (UNITS_PER_SIMD_WORD): Likewise. * tree-vect-analyze.c (vect_compute_data_ref_alignment): Replace UNITS_PER_SIMD_WORD with GET_MODE_SIZE (TYPE_MODE (vectype)). (vect_update_misalignment_for_peel): Likewise. (vector_alignment_reachable_p): Likewise. * tree-vect-transform.c (vectorizable_load): Likewise. * tree-vectorizer.c (vect_supportable_dr_alignment): Likewise. * tree-vectorizer.c (get_vectype_for_scalar_type): Pass mode of scalar_type to UNITS_PER_SIMD_WORD. * config/arm/arm.h (UNITS_PER_SIMD_WORD): Updated. * config/i386/i386.h (UNITS_PER_SIMD_WORD): Likewise. * config/mips/mips.h (UNITS_PER_SIMD_WORD): Likewise. * config/rs6000/rs6000.h (UNITS_PER_SIMD_WORD): Likewise. * config/sparc/sparc.h (UNITS_PER_SIMD_WORD): Likewise. From-SVN: r135759
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@ -1,3 +1,24 @@
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2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
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* defaults.h (UNITS_PER_SIMD_WORD): Add scalar mode as argument.
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* doc/tm.texi (UNITS_PER_SIMD_WORD): Likewise.
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* tree-vect-analyze.c (vect_compute_data_ref_alignment): Replace
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UNITS_PER_SIMD_WORD with GET_MODE_SIZE (TYPE_MODE (vectype)).
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(vect_update_misalignment_for_peel): Likewise.
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(vector_alignment_reachable_p): Likewise.
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* tree-vect-transform.c (vectorizable_load): Likewise.
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* tree-vectorizer.c (vect_supportable_dr_alignment): Likewise.
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* tree-vectorizer.c (get_vectype_for_scalar_type): Pass mode of
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scalar_type to UNITS_PER_SIMD_WORD.
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* config/arm/arm.h (UNITS_PER_SIMD_WORD): Updated.
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* config/i386/i386.h (UNITS_PER_SIMD_WORD): Likewise.
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* config/mips/mips.h (UNITS_PER_SIMD_WORD): Likewise.
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* config/rs6000/rs6000.h (UNITS_PER_SIMD_WORD): Likewise.
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* config/sparc/sparc.h (UNITS_PER_SIMD_WORD): Likewise.
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2008-05-22 Ira Rosen <irar@il.ibm.com>
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PR tree-optimization/36293
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@ -506,7 +506,7 @@ extern int arm_arch_hwdiv;
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/* Use the option -mvectorize-with-neon-quad to override the use of doubleword
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registers when autovectorizing for Neon, at least until multiple vector
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widths are supported properly by the middle-end. */
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#define UNITS_PER_SIMD_WORD \
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#define UNITS_PER_SIMD_WORD(MODE) \
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(TARGET_NEON ? (TARGET_NEON_VECTORIZE_QUAD ? 16 : 8) : UNITS_PER_WORD)
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/* True if natural alignment is used for doubleword types. */
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@ -1132,7 +1132,7 @@ do { \
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/* ??? No autovectorization into MMX or 3DNOW until we can reliably
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place emms and femms instructions. */
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#define UNITS_PER_SIMD_WORD (TARGET_SSE ? 16 : UNITS_PER_WORD)
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#define UNITS_PER_SIMD_WORD(MODE) (TARGET_SSE ? 16 : UNITS_PER_WORD)
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#define VALID_DFP_MODE_P(MODE) \
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((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode)
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@ -1193,7 +1193,8 @@ enum mips_code_readable_setting {
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/* The number of bytes in a double. */
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#define UNITS_PER_DOUBLE (TYPE_PRECISION (double_type_node) / BITS_PER_UNIT)
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#define UNITS_PER_SIMD_WORD (TARGET_PAIRED_SINGLE_FLOAT ? 8 : UNITS_PER_WORD)
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#define UNITS_PER_SIMD_WORD(MODE) \
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(TARGET_PAIRED_SINGLE_FLOAT ? 8 : UNITS_PER_WORD)
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/* Set the sizes of the core types. */
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#define SHORT_TYPE_SIZE 16
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@ -899,7 +899,7 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
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#define PAIRED_VECTOR_MODE(MODE) \
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((MODE) == V2SFmode)
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#define UNITS_PER_SIMD_WORD \
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#define UNITS_PER_SIMD_WORD(MODE) \
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(TARGET_ALTIVEC ? UNITS_PER_ALTIVEC_WORD \
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: (TARGET_SPE ? UNITS_PER_SPE_WORD : (TARGET_PAIRED_FLOAT ? \
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UNITS_PER_PAIRED_WORD : UNITS_PER_WORD)))
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@ -606,7 +606,7 @@ extern struct sparc_cpu_select sparc_select[];
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#define MIN_UNITS_PER_WORD 4
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#endif
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#define UNITS_PER_SIMD_WORD (TARGET_VIS ? 8 : UNITS_PER_WORD)
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#define UNITS_PER_SIMD_WORD(MODE) (TARGET_VIS ? 8 : UNITS_PER_WORD)
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/* Now define the sizes of the C data types. */
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@ -739,7 +739,7 @@ along with GCC; see the file COPYING3. If not see
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/* By default, only attempt to parallelize bitwise operations, and
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possibly adds/subtracts using bit-twiddling. */
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#ifndef UNITS_PER_SIMD_WORD
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#define UNITS_PER_SIMD_WORD UNITS_PER_WORD
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#define UNITS_PER_SIMD_WORD(MODE) UNITS_PER_WORD
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#endif
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/* Determine whether __cxa_atexit, rather than atexit, is used to
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@ -990,11 +990,11 @@ Minimum number of units in a word. If this is undefined, the default is
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smallest value that @code{UNITS_PER_WORD} can have at run-time.
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@end defmac
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@defmac UNITS_PER_SIMD_WORD
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Number of units in the vectors that the vectorizer can produce.
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The default is equal to @code{UNITS_PER_WORD}, because the vectorizer
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can do some transformations even in absence of specialized @acronym{SIMD}
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hardware.
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@defmac UNITS_PER_SIMD_WORD (@var{mode})
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Number of units in the vectors that the vectorizer can produce for
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scalar mode @var{mode}. The default is equal to @code{UNITS_PER_WORD},
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because the vectorizer can do some transformations even in absence of
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specialized @acronym{SIMD} hardware.
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@end defmac
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@defmac POINTER_SIZE
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@ -1370,6 +1370,7 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
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misalign = DR_INIT (dr);
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aligned_to = DR_ALIGNED_TO (dr);
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base_addr = DR_BASE_ADDRESS (dr);
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vectype = STMT_VINFO_VECTYPE (stmt_info);
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/* In case the dataref is in an inner-loop of the loop that is being
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vectorized (LOOP), we use the base and misalignment information
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@ -1382,7 +1383,7 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
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tree step = DR_STEP (dr);
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HOST_WIDE_INT dr_step = TREE_INT_CST_LOW (step);
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if (dr_step % UNITS_PER_SIMD_WORD == 0)
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if (dr_step % GET_MODE_SIZE (TYPE_MODE (vectype)) == 0)
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{
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if (vect_print_dump_info (REPORT_ALIGNMENT))
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fprintf (vect_dump, "inner step divides the vector-size.");
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@ -1399,7 +1400,6 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
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}
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base = build_fold_indirect_ref (base_addr);
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vectype = STMT_VINFO_VECTYPE (stmt_info);
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alignment = ssize_int (TYPE_ALIGN (vectype)/BITS_PER_UNIT);
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if ((aligned_to && tree_int_cst_compare (aligned_to, alignment) < 0)
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@ -1541,8 +1541,9 @@ vect_update_misalignment_for_peel (struct data_reference *dr,
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&& known_alignment_for_access_p (dr_peel))
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{
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int misal = DR_MISALIGNMENT (dr);
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tree vectype = STMT_VINFO_VECTYPE (stmt_info);
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misal += npeel * dr_size;
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misal %= UNITS_PER_SIMD_WORD;
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misal %= GET_MODE_SIZE (TYPE_MODE (vectype));
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SET_DR_MISALIGNMENT (dr, misal);
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return;
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}
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@ -1622,7 +1623,7 @@ vector_alignment_reachable_p (struct data_reference *dr)
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if (!known_alignment_for_access_p (dr))
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return false;
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elem_size = UNITS_PER_SIMD_WORD / nelements;
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elem_size = GET_MODE_SIZE (TYPE_MODE (vectype)) / nelements;
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mis_in_elements = DR_MISALIGNMENT (dr) / elem_size;
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if ((nelements - mis_in_elements) % DR_GROUP_SIZE (stmt_info))
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@ -5780,7 +5780,8 @@ vectorizable_load (tree stmt, block_stmt_iterator *bsi, tree *vec_stmt,
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nested within an outer-loop that is being vectorized. */
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if (nested_in_vect_loop_p (loop, stmt)
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&& (TREE_INT_CST_LOW (DR_STEP (dr)) % UNITS_PER_SIMD_WORD != 0))
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&& (TREE_INT_CST_LOW (DR_STEP (dr))
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% GET_MODE_SIZE (TYPE_MODE (vectype)) != 0))
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{
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gcc_assert (alignment_support_scheme != dr_explicit_realign_optimized);
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compute_in_loop = true;
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@ -1806,12 +1806,12 @@ get_vectype_for_scalar_type (tree scalar_type)
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int nunits;
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tree vectype;
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if (nbytes == 0 || nbytes >= UNITS_PER_SIMD_WORD)
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if (nbytes == 0 || nbytes >= UNITS_PER_SIMD_WORD (inner_mode))
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return NULL_TREE;
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/* FORNOW: Only a single vector size per target (UNITS_PER_SIMD_WORD)
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/* FORNOW: Only a single vector size per mode (UNITS_PER_SIMD_WORD)
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is expected. */
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nunits = UNITS_PER_SIMD_WORD / nbytes;
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nunits = UNITS_PER_SIMD_WORD (inner_mode) / nbytes;
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vectype = build_vector_type (scalar_type, nunits);
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if (vect_print_dump_info (REPORT_DETAILS))
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@ -1937,11 +1937,13 @@ vect_supportable_dr_alignment (struct data_reference *dr)
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&& (!targetm.vectorize.builtin_mask_for_load
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|| targetm.vectorize.builtin_mask_for_load ()))
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{
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if (nested_in_vect_loop
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&& TREE_INT_CST_LOW (DR_STEP (dr)) != UNITS_PER_SIMD_WORD)
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return dr_explicit_realign;
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else
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return dr_explicit_realign_optimized;
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tree vectype = STMT_VINFO_VECTYPE (stmt_info);
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if (nested_in_vect_loop
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&& (TREE_INT_CST_LOW (DR_STEP (dr))
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!= GET_MODE_SIZE (TYPE_MODE (vectype))))
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return dr_explicit_realign;
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else
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return dr_explicit_realign_optimized;
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}
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if (optab_handler (movmisalign_optab, mode)->insn_code !=
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