diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d844a3cd2d20..3bd6407aac21 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.target/aarch64/sve/tls_preserve_1.c: Require tls_native.
+	* gcc.target/aarch64/sve/tls_preserve_2.c: Likewise.
+	* gcc.target/aarch64/sve/tls_preserve_3.c: Likewise.
+
 2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>
 
 	* gcc.target/aarch64/sve/sel_3.c (permute_vnx4sf): Take __SVFloat32_t
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_1.c b/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_1.c
index 1d3777035927..e90ac78a526a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_1.c
@@ -1,8 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -fpic" } */
 /* { dg-require-effective-target fpic } */
-
-/* Clobber highs do not need to be spilled around tls usage.  */
+/* { dg-require-effective-target tls_native } */
 
 typedef float v4si __attribute__ ((vector_size (16)));
 
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_2.c b/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_2.c
index 8d73ad72a7fe..20e939fbb85b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_2.c
@@ -1,8 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -fpic -msve-vector-bits=256 -fno-schedule-insns" } */
 /* { dg-require-effective-target fpic } */
-
-/* Clobber highs must be spilled around tls usage.  */
+/* { dg-require-effective-target tls_native } */
 
 typedef float v8si __attribute__ ((vector_size (32)));
 
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_3.c b/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_3.c
index 17f39d184b14..a19908f29b6a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/tls_preserve_3.c
@@ -1,8 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -fpic -msve-vector-bits=512 -fno-schedule-insns" } */
 /* { dg-require-effective-target fpic } */
-
-/* Clobber highs must be spilled around tls usage.  */
+/* { dg-require-effective-target tls_native } */
 
 typedef float v16si __attribute__ ((vector_size (64)));