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h8300-protos.h: Add a prototype for byte_accesses_mergeable_p.
* config/h8300/h8300-protos.h: Add a prototype for byte_accesses_mergeable_p. * config/h8300/h8300.c (byte_accesses_mergeable_p): New. * config/h8300/h8300.md (*iorhi3_two_qi_mem): Likewise. (a splitter): Likewise. (*iorsi3_ashift_16_ashift_24): Likewise. (*iorsi3_ashift_16_ashift_24_mem): Likewise. From-SVN: r64518
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@ -1,3 +1,13 @@
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2003-03-17 Kazu Hirata <kazu@cs.umass.edu>
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* config/h8300/h8300-protos.h: Add a prototype for
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byte_accesses_mergeable_p.
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* config/h8300/h8300.c (byte_accesses_mergeable_p): New.
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* config/h8300/h8300.md (*iorhi3_two_qi_mem): Likewise.
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(a splitter): Likewise.
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(*iorsi3_ashift_16_ashift_24): Likewise.
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(*iorsi3_ashift_16_ashift_24_mem): Likewise.
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2003-03-17 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
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* dwarf2asm.h: Delete obsolete comment.
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@ -73,6 +73,7 @@ extern int iorxor_operator PARAMS ((rtx, enum machine_mode));
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extern int h8300_eightbit_constant_address_p PARAMS ((rtx));
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extern int h8300_tiny_constant_address_p PARAMS ((rtx));
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extern int byte_accesses_mergeable_p PARAMS ((rtx, rtx));
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/* Used in builtins.c */
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extern rtx h8300_return_addr_rtx PARAMS ((int, rtx));
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@ -4385,3 +4385,49 @@ h8300_tiny_constant_address_p (x)
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|| ((TARGET_H8300S && !TARGET_NORMAL_MODE)
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&& (IN_RANGE (addr, s1, s2) || IN_RANGE (addr, s3, s4))));
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}
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int
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byte_accesses_mergeable_p (addr1, addr2)
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rtx addr1, addr2;
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{
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HOST_WIDE_INT offset1, offset2;
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rtx reg1, reg2;
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if (REG_P (addr1))
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{
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reg1 = addr1;
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offset1 = 0;
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}
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else if (GET_CODE (addr1) == PLUS
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&& REG_P (XEXP (addr1, 0))
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&& GET_CODE (XEXP (addr1, 1)) == CONST_INT)
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{
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reg1 = XEXP (addr1, 0);
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offset1 = INTVAL (XEXP (addr1, 1));
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}
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else
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return 0;
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if (REG_P (addr2))
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{
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reg2 = addr2;
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offset2 = 0;
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}
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else if (GET_CODE (addr2) == PLUS
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&& REG_P (XEXP (addr2, 0))
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&& GET_CODE (XEXP (addr2, 1)) == CONST_INT)
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{
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reg2 = XEXP (addr2, 0);
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offset2 = INTVAL (XEXP (addr2, 1));
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}
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else
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return 0;
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if (((reg1 == stack_pointer_rtx && reg2 == stack_pointer_rtx)
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|| (reg1 == frame_pointer_rtx && reg2 == frame_pointer_rtx))
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&& offset1 % 2 == 0
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&& offset1 + 1 == offset2)
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return 1;
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return 0;
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}
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@ -2887,6 +2887,28 @@
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[(set_attr "cc" "clobber")
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(set_attr "length" "2")])
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(define_insn "*iorhi3_two_qi_mem"
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[(set (match_operand:HI 0 "register_operand" "=&r")
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(ior:HI (zero_extend:HI (match_operand:QI 1 "memory_operand" "m"))
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(ashift:HI (subreg:HI (match_operand:QI 2 "memory_operand" "m") 0)
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(const_int 8))))]
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""
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"mov.b\\t%X2,%t0\;mov.b\\t%X1,%s0"
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[(set_attr "cc" "clobber")
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(set_attr "length" "16")])
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(define_split
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[(set (match_operand:HI 0 "register_operand" "")
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(ior:HI (zero_extend:HI (match_operand:QI 1 "memory_operand" ""))
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(ashift:HI (subreg:HI (match_operand:QI 2 "memory_operand" "") 0)
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(const_int 8))))]
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"(TARGET_H8300H || TARGET_H8300S)
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&& reload_completed
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&& byte_accesses_mergeable_p (XEXP (operands[2], 0), XEXP (operands[1], 0))"
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[(set (match_dup 0)
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(match_dup 3))]
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"operands[3] = gen_rtx_MEM (HImode, XEXP (operands[2], 0));")
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;; ior:SI
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(define_insn "*iorsi3_two_hi"
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@ -3042,6 +3064,46 @@
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[(set_attr "length" "6")
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(set_attr "cc" "clobber")])
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(define_insn_and_split "*iorsi3_ashift_16_ashift_24"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "0")
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(const_int 16))
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(ashift:SI (match_operand:SI 2 "register_operand" "r")
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(const_int 24))))]
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"(TARGET_H8300H || TARGET_H8300S)"
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"#"
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"&& reload_completed"
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[(set (match_dup 3)
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(ior:HI (ashift:HI (match_dup 4)
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(const_int 8))
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(match_dup 3)))
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(parallel [(set (match_dup 0)
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(ashift:SI (match_dup 0)
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(const_int 16)))
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(clobber (scratch:QI))])]
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"operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));
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operands[4] = gen_rtx_REG (HImode, REGNO (operands[2]));")
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(define_insn_and_split "*iorsi3_ashift_16_ashift_24_mem"
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[(set (match_operand:SI 0 "register_operand" "=&r")
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(ior:SI (and:SI (ashift:SI (subreg:SI (match_operand:QI 1 "memory_operand" "m") 0)
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(const_int 16))
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(const_int 16711680))
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(ashift:SI (subreg:SI (match_operand:QI 2 "memory_operand" "m") 0)
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(const_int 24))))]
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"(TARGET_H8300H || TARGET_H8300S)"
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"#"
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"&& reload_completed"
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[(set (match_dup 3)
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(ior:HI (zero_extend:HI (match_dup 1))
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(ashift:HI (subreg:HI (match_dup 2) 0)
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(const_int 8))))
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(parallel [(set (match_dup 0)
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(ashift:SI (match_dup 0)
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(const_int 16)))
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(clobber (scratch:QI))])]
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"operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));")
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;; Used to add the exponent of a float.
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(define_insn "*addsi3_shift"
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