mirror of
git://gcc.gnu.org/git/gcc.git
synced 2024-12-25 07:09:00 +08:00
s390.md ("movti"): Add Q->Q alternative.
* config/s390/s390.md ("movti"): Add Q->Q alternative. ("*movdi_64", "*movdi_31", "*movsi", "movhi", "movqi_64", "movqi", "*movdf_64", "*movdf_31", "*movsf"): Likewise. ("*movti_ss", "*movdi_ss", "*movsi_ss", "*movdf_ss", "*movsf_ss"): Remove. From-SVN: r56765
This commit is contained in:
parent
710ba35f4f
commit
9b7c75b993
@ -1,3 +1,12 @@
|
||||
2002-09-03 Ulrich Weigand <uweigand@de.ibm.com>
|
||||
|
||||
* config/s390/s390.md ("movti"): Add Q->Q alternative.
|
||||
("*movdi_64", "*movdi_31", "*movsi", "movhi", "movqi_64",
|
||||
"movqi", "*movdf_64", "*movdf_31", "*movsf"): Likewise.
|
||||
|
||||
("*movti_ss", "*movdi_ss", "*movsi_ss", "*movdf_ss",
|
||||
"*movsf_ss"): Remove.
|
||||
|
||||
2002-09-03 John David Anglin <dave@hiauly1.hia.nrc.ca>
|
||||
|
||||
* pa32-regs.h (CLASS_CANNOT_CHANGE_MODE, CLASS_CANNOT_CHANGE_MODE_P):
|
||||
|
@ -779,24 +779,17 @@
|
||||
; movti instruction pattern(s).
|
||||
;
|
||||
|
||||
(define_insn "*movti_ss"
|
||||
[(set (match_operand:TI 0 "s_operand" "=Q")
|
||||
(match_operand:TI 1 "s_imm_operand" "Q"))]
|
||||
""
|
||||
"mvc\\t%O0(16,%R0),%1"
|
||||
[(set_attr "op_type" "SS")
|
||||
(set_attr "atype" "mem")])
|
||||
|
||||
(define_insn "movti"
|
||||
[(set (match_operand:TI 0 "nonimmediate_operand" "=d,Q,d,m")
|
||||
(match_operand:TI 1 "general_operand" "Q,d,dKm,d"))]
|
||||
[(set (match_operand:TI 0 "nonimmediate_operand" "=d,Q,d,m,Q")
|
||||
(match_operand:TI 1 "general_operand" "Q,d,dKm,d,Q"))]
|
||||
"TARGET_64BIT"
|
||||
"@
|
||||
lmg\\t%0,%N0,%1
|
||||
stmg\\t%1,%N1,%0
|
||||
#
|
||||
#"
|
||||
[(set_attr "op_type" "RSE,RSE,NN,NN")
|
||||
#
|
||||
mvc\\t%O0(16,%R0),%1"
|
||||
[(set_attr "op_type" "RSE,RSE,NN,NN,SS")
|
||||
(set_attr "atype" "mem")])
|
||||
|
||||
(define_split
|
||||
@ -913,17 +906,9 @@
|
||||
(set_attr "atype" "reg")
|
||||
(set_attr "type" "la")])
|
||||
|
||||
(define_insn "*movdi_ss"
|
||||
[(set (match_operand:DI 0 "s_operand" "=Q")
|
||||
(match_operand:DI 1 "s_imm_operand" "Q"))]
|
||||
""
|
||||
"mvc\\t%O0(8,%R0),%1"
|
||||
[(set_attr "op_type" "SS")
|
||||
(set_attr "atype" "mem")])
|
||||
|
||||
(define_insn "*movdi_64"
|
||||
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m")
|
||||
(match_operand:DI 1 "general_operand" "d,m,d,*f,m,*f"))]
|
||||
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,Q")
|
||||
(match_operand:DI 1 "general_operand" "d,m,d,*f,m,*f,Q"))]
|
||||
"TARGET_64BIT"
|
||||
"@
|
||||
lgr\\t%0,%1
|
||||
@ -931,13 +916,14 @@
|
||||
stg\\t%1,%0
|
||||
ldr\\t%0,%1
|
||||
ld\\t%0,%1
|
||||
std\\t%1,%0"
|
||||
[(set_attr "op_type" "RR,RXE,RXE,RR,RX,RX")
|
||||
(set_attr "atype" "reg,mem,mem,reg,mem,mem")])
|
||||
std\\t%1,%0
|
||||
mvc\\t%O0(8,%R0),%1"
|
||||
[(set_attr "op_type" "RR,RXE,RXE,RR,RX,RX,SS")
|
||||
(set_attr "atype" "reg,mem,mem,reg,mem,mem,mem")])
|
||||
|
||||
(define_insn "*movdi_31"
|
||||
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,m,!*f,!*f,!m")
|
||||
(match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,m,*f"))]
|
||||
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,m,!*f,!*f,!m,Q")
|
||||
(match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,m,*f,Q"))]
|
||||
"!TARGET_64BIT"
|
||||
"@
|
||||
lm\\t%0,%N0,%1
|
||||
@ -946,9 +932,10 @@
|
||||
#
|
||||
ldr\\t%0,%1
|
||||
ld\\t%0,%1
|
||||
std\\t%1,%0"
|
||||
[(set_attr "op_type" "RS,RS,NN,NN,RR,RX,RX")
|
||||
(set_attr "atype" "mem,mem,*,*,reg,mem,mem")])
|
||||
std\\t%1,%0
|
||||
mvc\\t%O0(8,%R0),%1"
|
||||
[(set_attr "op_type" "RS,RS,NN,NN,RR,RX,RX,SS")
|
||||
(set_attr "atype" "mem,mem,*,*,reg,mem,mem,mem")])
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:DI 0 "nonimmediate_operand" "")
|
||||
@ -1066,17 +1053,9 @@
|
||||
}"
|
||||
[(set_attr "op_type" "RI")])
|
||||
|
||||
(define_insn "*movsi_ss"
|
||||
[(set (match_operand:SI 0 "s_operand" "=Q")
|
||||
(match_operand:SI 1 "s_imm_operand" "Q"))]
|
||||
""
|
||||
"mvc\\t%O0(4,%R0),%1"
|
||||
[(set_attr "op_type" "SS")
|
||||
(set_attr "atype" "mem")])
|
||||
|
||||
(define_insn "*movsi"
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m")
|
||||
(match_operand:SI 1 "general_operand" "d,m,d,*f,m,*f"))]
|
||||
[(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,Q")
|
||||
(match_operand:SI 1 "general_operand" "d,m,d,*f,m,*f,Q"))]
|
||||
""
|
||||
"@
|
||||
lr\\t%0,%1
|
||||
@ -1084,9 +1063,10 @@
|
||||
st\\t%1,%0
|
||||
ler\\t%0,%1
|
||||
le\\t%0,%1
|
||||
ste\\t%1,%0"
|
||||
[(set_attr "op_type" "RR,RX,RX,RR,RX,RX")
|
||||
(set_attr "atype" "reg,mem,mem,reg,mem,mem")])
|
||||
ste\\t%1,%0
|
||||
mvc\\t%O0(4,%R0),%1"
|
||||
[(set_attr "op_type" "RR,RX,RX,RR,RX,RX,SS")
|
||||
(set_attr "atype" "reg,mem,mem,reg,mem,mem,mem")])
|
||||
|
||||
|
||||
;
|
||||
@ -1094,16 +1074,17 @@
|
||||
;
|
||||
|
||||
(define_insn "movhi"
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m")
|
||||
(match_operand:HI 1 "general_operand" "d,n,m,d"))]
|
||||
[(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m,Q")
|
||||
(match_operand:HI 1 "general_operand" "d,n,m,d,Q"))]
|
||||
""
|
||||
"@
|
||||
lr\\t%0,%1
|
||||
lhi\\t%0,%h1
|
||||
lh\\t%0,%1
|
||||
sth\\t%1,%0"
|
||||
[(set_attr "op_type" "RR,RI,RX,RX")
|
||||
(set_attr "atype" "reg,reg,mem,mem")])
|
||||
sth\\t%1,%0
|
||||
mvc\\t%O0(2,%R0),%1"
|
||||
[(set_attr "op_type" "RR,RI,RX,RX,SS")
|
||||
(set_attr "atype" "reg,reg,mem,mem,mem")])
|
||||
|
||||
|
||||
;
|
||||
@ -1111,31 +1092,33 @@
|
||||
;
|
||||
|
||||
(define_insn "movqi_64"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q")
|
||||
(match_operand:QI 1 "general_operand" "d,n,m,d,n"))]
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,Q")
|
||||
(match_operand:QI 1 "general_operand" "d,n,m,d,n,Q"))]
|
||||
"TARGET_64BIT"
|
||||
"@
|
||||
lr\\t%0,%1
|
||||
lhi\\t%0,%b1
|
||||
llgc\\t%0,%1
|
||||
stc\\t%1,%0
|
||||
mvi\\t%0,%b1"
|
||||
[(set_attr "op_type" "RR,RI,RXE,RX,SI")
|
||||
(set_attr "atype" "reg,reg,mem,mem,mem")])
|
||||
mvi\\t%0,%b1
|
||||
mvc\\t%O0(1,%R0),%1"
|
||||
[(set_attr "op_type" "RR,RI,RXE,RX,SI,SS")
|
||||
(set_attr "atype" "reg,reg,mem,mem,mem,mem")])
|
||||
|
||||
|
||||
(define_insn "movqi"
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q")
|
||||
(match_operand:QI 1 "general_operand" "d,n,m,d,n"))]
|
||||
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,Q")
|
||||
(match_operand:QI 1 "general_operand" "d,n,m,d,n,Q"))]
|
||||
""
|
||||
"@
|
||||
lr\\t%0,%1
|
||||
lhi\\t%0,%b1
|
||||
ic\\t%0,%1
|
||||
stc\\t%1,%0
|
||||
mvi\\t%0,%b1"
|
||||
[(set_attr "op_type" "RR,RI,RX,RX,SI")
|
||||
(set_attr "atype" "reg,reg,mem,mem,mem")])
|
||||
mvi\\t%0,%b1
|
||||
mvc\\t%O0(1,%R0),%1"
|
||||
[(set_attr "op_type" "RR,RI,RX,RX,SI,SS")
|
||||
(set_attr "atype" "reg,reg,mem,mem,mem,mem")])
|
||||
|
||||
|
||||
;
|
||||
@ -1196,17 +1179,9 @@
|
||||
operands[1] = force_const_mem (DFmode, operands[1]);
|
||||
}")
|
||||
|
||||
(define_insn "*movdf_ss"
|
||||
[(set (match_operand:DF 0 "s_operand" "=Q")
|
||||
(match_operand:DF 1 "s_imm_operand" "Q"))]
|
||||
""
|
||||
"mvc\\t%O0(8,%R0),%1"
|
||||
[(set_attr "op_type" "SS")
|
||||
(set_attr "atype" "mem")])
|
||||
|
||||
(define_insn "*movdf_64"
|
||||
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,d,m")
|
||||
(match_operand:DF 1 "general_operand" "f,m,f,d,m,d"))]
|
||||
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,d,m,Q")
|
||||
(match_operand:DF 1 "general_operand" "f,m,f,d,m,d,Q"))]
|
||||
"TARGET_64BIT"
|
||||
"@
|
||||
ldr\\t%0,%1
|
||||
@ -1214,13 +1189,14 @@
|
||||
std\\t%1,%0
|
||||
lgr\\t%0,%1
|
||||
lg\\t%0,%1
|
||||
stg\\t%1,%0"
|
||||
[(set_attr "op_type" "RR,RX,RX,RR,RXE,RXE")
|
||||
(set_attr "atype" "reg,mem,mem,reg,mem,mem")])
|
||||
stg\\t%1,%0
|
||||
mvc\\t%O0(8,%R0),%1"
|
||||
[(set_attr "op_type" "RR,RX,RX,RR,RXE,RXE,SS")
|
||||
(set_attr "atype" "reg,mem,mem,reg,mem,mem,mem")])
|
||||
|
||||
(define_insn "*movdf_31"
|
||||
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,Q,d,m")
|
||||
(match_operand:DF 1 "general_operand" "f,m,f,Q,d,dKm,d"))]
|
||||
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,Q,d,m,Q")
|
||||
(match_operand:DF 1 "general_operand" "f,m,f,Q,d,dKm,d,Q"))]
|
||||
"!TARGET_64BIT"
|
||||
"@
|
||||
ldr\\t%0,%1
|
||||
@ -1229,9 +1205,10 @@
|
||||
lm\\t%0,%N0,%1
|
||||
stm\\t%1,%N1,%0
|
||||
#
|
||||
#"
|
||||
[(set_attr "op_type" "RR,RX,RX,RS,RS,NN,NN")
|
||||
(set_attr "atype" "reg,mem,mem,mem,mem,*,*")])
|
||||
#
|
||||
mvc\\t%O0(8,%R0),%1"
|
||||
[(set_attr "op_type" "RR,RX,RX,RS,RS,NN,NN,SS")
|
||||
(set_attr "atype" "reg,mem,mem,mem,mem,*,*,mem")])
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:DF 0 "nonimmediate_operand" "")
|
||||
@ -1299,17 +1276,9 @@
|
||||
operands[1] = force_const_mem (SFmode, operands[1]);
|
||||
}")
|
||||
|
||||
(define_insn "*movsf_ss"
|
||||
[(set (match_operand:SF 0 "s_operand" "=Q")
|
||||
(match_operand:SF 1 "s_imm_operand" "Q"))]
|
||||
""
|
||||
"mvc\\t%O0(4,%R0),%1"
|
||||
[(set_attr "op_type" "SS")
|
||||
(set_attr "atype" "mem")])
|
||||
|
||||
(define_insn "*movsf"
|
||||
[(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,m,d,d,m")
|
||||
(match_operand:SF 1 "general_operand" "f,m,f,d,m,d"))]
|
||||
[(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,m,d,d,m,Q")
|
||||
(match_operand:SF 1 "general_operand" "f,m,f,d,m,d,Q"))]
|
||||
""
|
||||
"@
|
||||
ler\\t%0,%1
|
||||
@ -1317,9 +1286,10 @@
|
||||
ste\\t%1,%0
|
||||
lr\\t%0,%1
|
||||
l\\t%0,%1
|
||||
st\\t%1,%0"
|
||||
[(set_attr "op_type" "RR,RX,RX,RR,RX,RX")
|
||||
(set_attr "atype" "reg,mem,mem,reg,mem,mem")])
|
||||
st\\t%1,%0
|
||||
mvc\\t%O0(4,%R0),%1"
|
||||
[(set_attr "op_type" "RR,RX,RX,RR,RX,RX,SS")
|
||||
(set_attr "atype" "reg,mem,mem,reg,mem,mem,mem")])
|
||||
|
||||
;
|
||||
; load_multiple pattern(s).
|
||||
|
Loading…
Reference in New Issue
Block a user