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[ARM][1/3] Add rev field to rtx cost tables
* config/arm/aarch-common-protos.h (alu_cost_table): Add rev field. * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify rev cost. (cortex_a53_extra_costs): Likewise. (cortex_a57_extra_costs): Likewise. * config/arm/arm.c (cortexa9_extra_costs): Likewise. (cortexa7_extra_costs): Likewise. (cortexa8_extra_costs): Likewise. (cortexa12_extra_costs): Likewise. (cortexa15_extra_costs): Likewise. (v7m_extra_costs): Likewise. (arm_new_rtx_costs): Handle BSWAP. From-SVN: r209703
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@ -1,3 +1,18 @@
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2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
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* config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
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rev cost.
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(cortex_a53_extra_costs): Likewise.
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(cortex_a57_extra_costs): Likewise.
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* config/arm/arm.c (cortexa9_extra_costs): Likewise.
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(cortexa7_extra_costs): Likewise.
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(cortexa8_extra_costs): Likewise.
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(cortexa12_extra_costs): Likewise.
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(cortexa15_extra_costs): Likewise.
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(v7m_extra_costs): Likewise.
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(arm_new_rtx_costs): Handle BSWAP.
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2013-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/arm/arm.c (cortexa8_extra_costs): New table.
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@ -54,6 +54,7 @@ struct alu_cost_table
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const int bfi; /* Bit-field insert. */
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const int bfx; /* Bit-field extraction. */
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const int clz; /* Count Leading Zeros. */
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const int rev; /* Reverse bits/bytes. */
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const int non_exec; /* Extra cost when not executing insn. */
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const bool non_exec_costs_exec; /* True if non-execution must add the exec
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cost. */
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@ -39,6 +39,7 @@ const struct cpu_cost_table generic_extra_costs =
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0, /* bfi. */
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0, /* bfx. */
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0, /* clz. */
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0, /* rev. */
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COSTS_N_INSNS (1), /* non_exec. */
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false /* non_exec_costs_exec. */
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},
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@ -139,6 +140,7 @@ const struct cpu_cost_table cortexa53_extra_costs =
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COSTS_N_INSNS (1), /* bfi. */
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COSTS_N_INSNS (1), /* bfx. */
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0, /* clz. */
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0, /* rev. */
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0, /* non_exec. */
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true /* non_exec_costs_exec. */
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},
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@ -239,6 +241,7 @@ const struct cpu_cost_table cortexa57_extra_costs =
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COSTS_N_INSNS (1), /* bfi. */
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0, /* bfx. */
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0, /* clz. */
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0, /* rev. */
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0, /* non_exec. */
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true /* non_exec_costs_exec. */
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},
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@ -986,6 +986,7 @@ const struct cpu_cost_table cortexa9_extra_costs =
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COSTS_N_INSNS (1), /* bfi. */
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COSTS_N_INSNS (1), /* bfx. */
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0, /* clz. */
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0, /* rev. */
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0, /* non_exec. */
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true /* non_exec_costs_exec. */
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},
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@ -1086,6 +1087,7 @@ const struct cpu_cost_table cortexa8_extra_costs =
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0, /* bfi. */
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0, /* bfx. */
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0, /* clz. */
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0, /* rev. */
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0, /* non_exec. */
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true /* non_exec_costs_exec. */
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},
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@ -1188,6 +1190,7 @@ const struct cpu_cost_table cortexa7_extra_costs =
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COSTS_N_INSNS (1), /* bfi. */
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COSTS_N_INSNS (1), /* bfx. */
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COSTS_N_INSNS (1), /* clz. */
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COSTS_N_INSNS (1), /* rev. */
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0, /* non_exec. */
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true /* non_exec_costs_exec. */
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},
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@ -1289,6 +1292,7 @@ const struct cpu_cost_table cortexa12_extra_costs =
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0, /* bfi. */
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COSTS_N_INSNS (1), /* bfx. */
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COSTS_N_INSNS (1), /* clz. */
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COSTS_N_INSNS (1), /* rev. */
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0, /* non_exec. */
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true /* non_exec_costs_exec. */
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},
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@ -1389,6 +1393,7 @@ const struct cpu_cost_table cortexa15_extra_costs =
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COSTS_N_INSNS (1), /* bfi. */
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0, /* bfx. */
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0, /* clz. */
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0, /* rev. */
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0, /* non_exec. */
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true /* non_exec_costs_exec. */
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},
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@ -1489,6 +1494,7 @@ const struct cpu_cost_table v7m_extra_costs =
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0, /* bfi. */
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0, /* bfx. */
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0, /* clz. */
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0, /* rev. */
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COSTS_N_INSNS (1), /* non_exec. */
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false /* non_exec_costs_exec. */
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},
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@ -9470,6 +9476,47 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
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*cost = LIBCALL_COST (2);
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return false;
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case BSWAP:
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if (arm_arch6)
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{
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if (mode == SImode)
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{
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*cost = COSTS_N_INSNS (1);
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if (speed_p)
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*cost += extra_cost->alu.rev;
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return false;
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}
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}
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else
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{
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/* No rev instruction available. Look at arm_legacy_rev
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and thumb_legacy_rev for the form of RTL used then. */
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if (TARGET_THUMB)
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{
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*cost = COSTS_N_INSNS (10);
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if (speed_p)
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{
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*cost += 6 * extra_cost->alu.shift;
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*cost += 3 * extra_cost->alu.logical;
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}
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}
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else
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{
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*cost = COSTS_N_INSNS (5);
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if (speed_p)
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{
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*cost += 2 * extra_cost->alu.shift;
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*cost += extra_cost->alu.arith_shift;
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*cost += 2 * extra_cost->alu.logical;
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}
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}
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return true;
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}
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return false;
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case MINUS:
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if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
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&& (mode == SFmode || !TARGET_VFP_SINGLE))
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