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arm: Split xorsi with constant after reload.

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This puts xorsi3 in the same format as andsi3 and iorsi3.
This similarity fixes code generation issues with splitting
atomic_fetch_xor post-reload.

        * config/arm/arm.md (*arm_xorsi3): Match iorsi3 and perform
        post-reload splitting.

From-SVN: r182562
This commit is contained in:
Richard Henderson 2011-12-20 16:35:41 -08:00 committed by Richard Henderson
parent 6cb2b9646d
commit 96e69fe20e
2 changed files with 21 additions and 6 deletions
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3
gcc/ChangeLog
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@ -1,5 +1,8 @@
2011-12-20 Richard Henderson <rth@redhat.com>
* config/arm/arm.md (*arm_xorsi3): Match iorsi3 and perform
post-reload splitting.
* config/arm/arm.md (*arm_cmpdi_unsigned): Enable for thumb2.
* config/arm/arm.c (arm_select_cc_mode): Use it.

24
gcc/config/arm/arm.md
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@ -3061,13 +3061,25 @@
}"
)
(define_insn "*arm_xorsi3"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(xor:SI (match_operand:SI 1 "s_register_operand" "r")
(match_operand:SI 2 "arm_rhs_operand" "rI")))]
(define_insn_and_split "*arm_xorsi3"
[(set (match_operand:SI 0 "s_register_operand" "=r,r")
(xor:SI (match_operand:SI 1 "s_register_operand" "%r,r")
(match_operand:SI 2 "reg_or_int_operand" "rI,?n")))]
"TARGET_32BIT"
"eor%?\\t%0, %1, %2"
[(set_attr "predicable" "yes")]
"@
eor%?\\t%0, %1, %2
#"
"TARGET_32BIT
&& GET_CODE (operands[2]) == CONST_INT
&& !const_ok_for_arm (INTVAL (operands[2]))"
[(clobber (const_int 0))]
{
arm_split_constant (XOR, SImode, curr_insn,
INTVAL (operands[2]), operands[0], operands[1], 0);
DONE;
}
[(set_attr "length" "4,16")
(set_attr "predicable" "yes")]
)
(define_insn "*thumb1_xorsi3_insn"