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re PR c++/12727 (mipsisa64-elf -mips32 regression: g++.dg/eh/registers1.C)

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PR target/12727
	* config/mips/mips.c (mips_save_reg): Fix frame information for sdc1
	on 32-bit big-endian targets.

From-SVN: r74071
This commit is contained in:
Richard Sandiford 2003-11-30 19:30:14 +00:00 committed by Richard Sandiford
parent 85a45cbb94
commit 936b13179f
2 changed files with 12 additions and 2 deletions
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6
gcc/ChangeLog
View File

@ -1,3 +1,9 @@
2003-11-30 Richard Sandiford <rsandifo@redhat.com>
PR target/12727
* config/mips/mips.c (mips_save_reg): Fix frame information for sdc1
on 32-bit big-endian targets.
2003-11-30 Kazu Hirata <kazu@cs.umass.edu>
* genemit.c (register_constraints): Remove.

8
gcc/config/mips/mips.c
View File

@ -6543,11 +6543,15 @@ mips_frame_set (rtx mem, rtx reg)
static void
mips_save_reg (rtx reg, rtx mem)
{
if (GET_MODE (reg) == DFmode && mips_split_64bit_move_p (mem, reg))
if (GET_MODE (reg) == DFmode && !TARGET_FLOAT64)
{
rtx x1, x2;
mips_split_64bit_move (mem, reg);
if (mips_split_64bit_move_p (mem, reg))
mips_split_64bit_move (mem, reg);
else
emit_move_insn (mem, reg);
x1 = mips_frame_set (mips_subword (mem, 0), mips_subword (reg, 0));
x2 = mips_frame_set (mips_subword (mem, 1), mips_subword (reg, 1));
mips_set_frame_expr (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, x1, x2)));