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re PR target/29006 (Incorrect zeroing of unaligned 64-bit fields on MIPS targets)

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gcc/
	PR target/29006
	* config/mips/mips-protos.h (mips_mem_fits_mode_p): Declare.
	* config/mips/mips.c (mips_expand_unaligned_store): Use the mode
	returned by mode_for_size, rather than the mode of src itself,
	to choose between 32-bit and 64-bit patterns.
	(mips_mem_fits_mode_p): New function.
	* config/mips/mips.md (mov_<load>l, mov_<load>r): Use it to check
	that the size of the source matches the size of the destination.
	(mov_<store>l, mov_<store>r): Likewise.

gcc/testsuite/
	PR target/29006
	* gcc.c-torture/execute/pr29006.c: New test.

From-SVN: r116822
This commit is contained in:
Richard Sandiford 2006-09-10 19:28:48 +00:00 committed by Richard Sandiford
parent ca6f2eefa4
commit 9226543b67
6 changed files with 43 additions and 6 deletions
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12
gcc/ChangeLog
View File

@ -1,3 +1,15 @@
2006-09-10 Richard Sandiford <richard@codesourcery.com>
PR target/29006
* config/mips/mips-protos.h (mips_mem_fits_mode_p): Declare.
* config/mips/mips.c (mips_expand_unaligned_store): Use the mode
returned by mode_for_size, rather than the mode of src itself,
to choose between 32-bit and 64-bit patterns.
(mips_mem_fits_mode_p): New function.
* config/mips/mips.md (mov_<load>l, mov_<load>r): Use it to check
that the size of the source matches the size of the destination.
(mov_<store>l, mov_<store>r): Likewise.
2006-09-10 Eric Christopher <echristo@apple.com>
* config/darwin.c (machopic_select_rtx_section): Add CONST_VECTOR

1
gcc/config/mips/mips-protos.h
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@ -189,6 +189,7 @@ extern void mips_va_start (tree, rtx);
extern bool mips_expand_unaligned_load (rtx, rtx, unsigned int, int);
extern bool mips_expand_unaligned_store (rtx, rtx, unsigned int, int);
extern bool mips_mem_fits_mode_p (enum machine_mode mode, rtx x);
extern void override_options (void);
extern void mips_conditional_register_usage (void);
extern void mips_order_regs_for_local_alloc (void);

20
gcc/config/mips/mips.c
View File

@ -4541,13 +4541,15 @@ bool
mips_expand_unaligned_store (rtx dest, rtx src, unsigned int width, int bitpos)
{
rtx left, right;
enum machine_mode mode;
if (!mips_get_unaligned_mem (&dest, width, bitpos, &left, &right))
return false;
src = gen_lowpart (mode_for_size (width, MODE_INT, 0), src);
mode = mode_for_size (width, MODE_INT, 0);
src = gen_lowpart (mode, src);
if (GET_MODE (src) == DImode)
if (mode == DImode)
{
emit_insn (gen_mov_sdl (dest, src, left));
emit_insn (gen_mov_sdr (copy_rtx (dest), copy_rtx (src), right));
@ -4560,6 +4562,20 @@ mips_expand_unaligned_store (rtx dest, rtx src, unsigned int width, int bitpos)
return true;
}
/* Return true if X is a MEM with the same size as MODE. */
bool
mips_mem_fits_mode_p (enum machine_mode mode, rtx x)
{
rtx size;
if (!MEM_P (x))
return false;
size = MEM_SIZE (x);
return size && INTVAL (size) == GET_MODE_SIZE (mode);
}
/* Return true if (zero_extract OP SIZE POSITION) can be used as the
source of an "ext" instruction or the destination of an "ins"
instruction. OP must be a register operand and the following

8
gcc/config/mips/mips.md
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@ -2970,7 +2970,7 @@
(unspec:GPR [(match_operand:BLK 1 "memory_operand" "m")
(match_operand:QI 2 "memory_operand" "m")]
UNSPEC_LOAD_LEFT))]
"!TARGET_MIPS16"
"!TARGET_MIPS16 && mips_mem_fits_mode_p (<MODE>mode, operands[1])"
"<load>l\t%0,%2"
[(set_attr "type" "load")
(set_attr "mode" "<MODE>")])
@ -2981,7 +2981,7 @@
(match_operand:QI 2 "memory_operand" "m")
(match_operand:GPR 3 "register_operand" "0")]
UNSPEC_LOAD_RIGHT))]
"!TARGET_MIPS16"
"!TARGET_MIPS16 && mips_mem_fits_mode_p (<MODE>mode, operands[1])"
"<load>r\t%0,%2"
[(set_attr "type" "load")
(set_attr "mode" "<MODE>")])
@ -2991,7 +2991,7 @@
(unspec:BLK [(match_operand:GPR 1 "reg_or_0_operand" "dJ")
(match_operand:QI 2 "memory_operand" "m")]
UNSPEC_STORE_LEFT))]
"!TARGET_MIPS16"
"!TARGET_MIPS16 && mips_mem_fits_mode_p (<MODE>mode, operands[0])"
"<store>l\t%z1,%2"
[(set_attr "type" "store")
(set_attr "mode" "<MODE>")])
@ -3002,7 +3002,7 @@
(match_operand:QI 2 "memory_operand" "m")
(match_dup 0)]
UNSPEC_STORE_RIGHT))]
"!TARGET_MIPS16"
"!TARGET_MIPS16 && mips_mem_fits_mode_p (<MODE>mode, operands[0])"
"<store>r\t%z1,%2"
[(set_attr "type" "store")
(set_attr "mode" "<MODE>")])

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2006-09-10 Richard Sandiford <richard@codesourcery.com>
PR target/29006
* gcc.c-torture/execute/pr29006.c: New test.
2006-09-10 Paul Thomas <pault@gcc.gnu.org>
PR libfortran/28947

3
gcc/testsuite/gcc.c-torture/execute/pr29006.c Normal file
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@ -0,0 +1,3 @@
struct __attribute__((__packed__)) s { char c; unsigned long long x; };
void __attribute__((__noinline__)) foo (struct s *s) { s->x = 0; }
int main (void) { struct s s = { 1, ~0ULL }; foo (&s); return s.x != 0; }