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lib2hw_mul.S: Fix wrong syntax in branch instruction.
2019-10-23 Jozef Lawrynowicz <jozef.l@mittosystems.com> * config/msp430/lib2hw_mul.S: Fix wrong syntax in branch instruction. s/RESULT_LO/RESLO, s/RESULT_HI/RESHI, s/MPY_OP1/MPY, s/MPY_OP1_S/MPYS, s/MAC_OP1/MAC, s/MPY_OP2/OP2, s/MAC_OP2/OP2. Define symbols for 32-bit and f5series hardware multiply register addresses. Replace hard-coded register addresses with symbols. Fix "_mspabi*" typo. Fix whitespace. * config/msp430/lib2mul.c: Add comment. From-SVN: r277340
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Jozef Lawrynowicz
Jozef Lawrynowicz
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161c3bf9ee
commit
91c64455e8
@ -1,3 +1,15 @@
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2019-10-23 Jozef Lawrynowicz <jozef.l@mittosystems.com>
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* config/msp430/lib2hw_mul.S: Fix wrong syntax in branch instruction.
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s/RESULT_LO/RESLO, s/RESULT_HI/RESHI, s/MPY_OP1/MPY,
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s/MPY_OP1_S/MPYS, s/MAC_OP1/MAC, s/MPY_OP2/OP2, s/MAC_OP2/OP2.
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Define symbols for 32-bit and f5series hardware multiply
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register addresses.
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Replace hard-coded register addresses with symbols.
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Fix "_mspabi*" typo.
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Fix whitespace.
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* config/msp430/lib2mul.c: Add comment.
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2019-10-15 John David Anglin <danglin@gcc.gnu.org>
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* config/pa/fptr.c (_dl_read_access_allowed): Change argument to
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@ -81,9 +81,9 @@
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.type \gcc_name , @function
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\gcc_name:
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#ifdef __MSP430X_LARGE__
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BRA \eabi_soft_name
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BRA #\eabi_soft_name
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#else
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BR \eabi_soft_name
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BR #\eabi_soft_name
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#endif
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.size \gcc_name , . - \gcc_name
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.popsection
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@ -109,7 +109,7 @@
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MOV.W &\RESULT, r12 ; Move result into return register
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.endm
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.macro mult1632 OP1, OP2, RESULT_LO, RESULT_HI
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.macro mult1632 OP1, OP2, RESLO, RESHI
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;* * 16-bit hardware multiply with a 32-bit result:
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;* int32 = int16 * int16
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;* uint32 = uint16 * uint16
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@ -127,11 +127,11 @@
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MOV.W r12, &\OP1 ; Load operand 1 into multiplier
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MOV.W r13, &\OP2 ; Load operand 2 which triggers MPY
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MOV.W &\RESULT_LO, r12 ; Move low result into return register
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MOV.W &\RESULT_HI, r13 ; Move high result into return register
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MOV.W &\RESLO, r12 ; Move low result into return register
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MOV.W &\RESHI, r13 ; Move high result into return register
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.endm
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.macro mult32 OP1, OP2, MAC_OP1, MAC_OP2, RESULT_LO, RESULT_HI
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.macro mult32 OP1, OP2, MAC_OP1, MAC_OP2, RESLO, RESHI
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;* * 32-bit hardware multiply with a 32-bit result using 16 multiply and accumulate:
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;* int32 = int32 * int32
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;*
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@ -149,16 +149,16 @@
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MOV.W r12, &\OP1 ; Load operand 1 Low into multiplier
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MOV.W r14, &\OP2 ; Load operand 2 Low which triggers MPY
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MOV.W r12, &\MAC_OP1 ; Load operand 1 Low into mac
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MOV.W &\RESULT_LO, r12 ; Low 16-bits of result ready for return
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MOV.W &\RESULT_HI, &\RESULT_LO; MOV intermediate mpy high into low
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MOV.W &\RESLO, r12 ; Low 16-bits of result ready for return
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MOV.W &\RESHI, &\RESLO ; MOV intermediate mpy high into low
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MOV.W r15, &\MAC_OP2 ; Load operand 2 High, trigger MAC
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MOV.W r13, &\MAC_OP1 ; Load operand 1 High
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MOV.W r14, &\MAC_OP2 ; Load operand 2 Lo, trigger MAC
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MOV.W &\RESULT_LO, r13 ; Upper 16-bits result ready for return
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MOV.W &\RESLO, r13 ; Upper 16-bits result ready for return
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.endm
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.macro mult32_hw OP1_LO OP1_HI OP2_LO OP2_HI RESULT_LO RESULT_HI
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.macro mult32_hw OP1_LO OP1_HI OP2_LO OP2_HI RESLO RESHI
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;* * 32-bit hardware multiply with a 32-bit result
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;* int32 = int32 * int32
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;*
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@ -177,8 +177,8 @@
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MOV.W r13, &\OP1_HI ; Load operand 1 High into multiplier
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MOV.W r14, &\OP2_LO ; Load operand 2 Low into multiplier
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MOV.W r15, &\OP2_HI ; Load operand 2 High, trigger MPY
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MOV.W &\RESULT_LO, r12 ; Ready low 16-bits for return
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MOV.W &\RESULT_HI, r13 ; Ready high 16-bits for return
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MOV.W &\RESLO, r12 ; Ready low 16-bits for return
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MOV.W &\RESHI, r13 ; Ready high 16-bits for return
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.endm
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.macro mult3264_hw OP1_LO OP1_HI OP2_LO OP2_HI RES0 RES1 RES2 RES3
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@ -264,105 +264,141 @@
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;; Multiply unsigned long by unsigned long; result is unsigned long long. Uses hardware MPY16
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;; uint64 __mspabi_mpyull_hw32(uint32 x, uint32 y)
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;; Multiply unsigned long by unsigned long; result is unsigned long long. Uses hardware MPY32 (F4xx devices).
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;; uint64 _ _mspabi_mpyull_f5hw(uint32 x, uint32 y)
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;; uint64 __mspabi_mpyull_f5hw(uint32 x, uint32 y)
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;; Multiply unsigned long by unsigned long; result is unsigned long long. Uses hardware MPY32 (F5xx devices and up)
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;;;; The register names below are the standardised versions used across TI
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;;;; literature.
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.set MPY_OP1, 0x0130
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.set MPY_OP1_S, 0x0132
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.set MAC_OP1, 0x0134
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.set MPY_OP2, 0x0138
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.set MAC_OP2, 0x0138
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.set RESULT_LO, 0x013A
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.set RESULT_HI, 0x013C
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;; Hardware multiply register addresses for devices with 16-bit hardware
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;; multiply.
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.set MPY, 0x0130
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.set MPYS, 0x0132
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.set MAC, 0x0134
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.set OP2, 0x0138
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.set RESLO, 0x013A
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.set RESHI, 0x013C
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;; Hardware multiply register addresses for devices with 32-bit (non-f5)
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;; hardware multiply.
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.set MPY32L, 0x0140
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.set MPY32H, 0x0142
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.set MPYS32L, 0x0144
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.set MPYS32H, 0x0146
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.set OP2L, 0x0150
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.set OP2H, 0x0152
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.set RES0, 0x0154
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.set RES1, 0x0156
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.set RES2, 0x0158
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.set RES3, 0x015A
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;; Hardware multiply register addresses for devices with f5series hardware
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;; multiply.
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;; The F5xxx series of MCUs support the same 16-bit and 32-bit multiply
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;; as the second generation hardware, but they are accessed from different
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;; memory registers.
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;; These names AREN'T standard. We've appended _F5 to the standard names.
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.set MPY_F5, 0x04C0
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.set MPYS_F5, 0x04C2
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.set MAC_F5, 0x04C4
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.set OP2_F5, 0x04C8
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.set RESLO_F5, 0x04CA
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.set RESHI_F5, 0x04CC
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.set MPY32L_F5, 0x04D0
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.set MPY32H_F5, 0x04D2
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.set MPYS32L_F5, 0x04D4
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.set MPYS32H_F5, 0x04D6
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.set OP2L_F5, 0x04E0
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.set OP2H_F5, 0x04E2
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.set RES0_F5, 0x04E4
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.set RES1_F5, 0x04E6
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.set RES2_F5, 0x04E8
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.set RES3_F5, 0x04EA
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#if defined MUL_16
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;; First generation MSP430 hardware multiplies ...
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start_func __mulhi2 __mspabi_mpyi __mspabi_mpyi_hw
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mult16 MPY_OP1, MPY_OP2, RESULT_LO
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mult16 MPY, OP2, RESLO
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end_func __mulhi2
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start_func __mulsihi2 __mspabi_mpysl __mspabi_mpysl_hw
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mult1632 MPY_OP1_S, MPY_OP2, RESULT_LO, RESULT_HI
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end_func __mulsihi2
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start_func __mulhisi2 __mspabi_mpysl __mspabi_mpysl_hw
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mult1632 MPYS, OP2, RESLO, RESHI
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end_func __mulhisi2
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start_func __umulsihi2 __mspabi_mpyul _mspabi_mpyul_hw
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mult1632 MPY_OP1, MPY_OP2, RESULT_LO, RESULT_HI
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end_func __umulsihi2
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start_func __umulhisi2 __mspabi_mpyul __mspabi_mpyul_hw
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mult1632 MPY, OP2, RESLO, RESHI
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end_func __umulhisi2
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start_func __mulsi2 __mspabi_mpyl __mspabi_mpyl_hw
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mult32 MPY_OP1, MPY_OP2, MAC_OP1, MAC_OP2, RESULT_LO, RESULT_HI
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mult32 MPY, OP2, MAC, OP2, RESLO, RESHI
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end_func __mulsi2
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;; FIXME: We do not have hardware implementations of these
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;; routines, so just jump to the software versions instead.
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fake_func __muldisi2 __mspabi_mpysll __mspabi_mpysll_hw
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fake_func __umuldisi2 __mspabi_mpyull __mspabi_mpyull_hw
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fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_hw
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fake_func __mulsidi2 __mspabi_mpysll __mspabi_mpysll_hw
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fake_func __umulsidi2 __mspabi_mpyull __mspabi_mpyull_hw
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fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_hw
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#elif defined MUL_32
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;; Second generation MSP430 hardware multiplies ...
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start_func __mulhi2 __mspabi_mpyi __mspabi_mpyi_hw
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mult16 MPY_OP1, MPY_OP2, RESULT_LO
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mult16 MPY, OP2, RESLO
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end_func __mulhi2
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start_func __mulsihi2 __mspabi_mpysl __mspabi_mpysl_hw
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mult1632 MPY_OP1_S, MPY_OP2, RESULT_LO, RESULT_HI
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end_func __mulsihi2
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start_func __mulhisi2 __mspabi_mpysl __mspabi_mpysl_hw
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mult1632 MPYS, OP2, RESLO, RESHI
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end_func __mulhisi2
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start_func __umulsihi2 __mspabi_mpyul _mspabi_mpyul_hw
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mult1632 MPY_OP1, MPY_OP2, RESULT_LO, RESULT_HI
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end_func __umulsihi2
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start_func __umulhisi2 __mspabi_mpyul __mspabi_mpyul_hw
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mult1632 MPY, OP2, RESLO, RESHI
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end_func __umulhisi2
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start_func __mulsi2_hw32 __mspabi_mpyl __mspabi_mpyl_hw32
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mult32_hw 0x0140, 0x0142, 0x0150, 0x0152, 0x0154, 0x0156
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mult32_hw MPY32L, MPY32H, OP2L, OP2H, RES0, RES1
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end_func __mulsi2_hw32
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start_func __muldisi2 __mspabi_mpysll __mspabi_mpysll_hw32
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mult3264_hw 0x0144, 0x146, 0x0150, 0x0152, 0x0154, 0x0156, 0x0158, 0x015A
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end_func __muldisi2
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start_func __mulsidi2 __mspabi_mpysll __mspabi_mpysll_hw32
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mult3264_hw MPYS32L, MPYS32H, OP2L, OP2H, RES0, RES1, RES2, RES3
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end_func __mulsidi2
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start_func __umuldisi2 __mspabi_mpyull __mspabi_mpyull_hw32
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mult3264_hw 0x0140, 0x142, 0x0150, 0x0152, 0x0154, 0x0156, 0x0158, 0x015A
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end_func __umuldisi2
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start_func __umulsidi2 __mspabi_mpyull __mspabi_mpyull_hw32
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mult3264_hw MPY32L, MPY32H, OP2L, OP2H, RES0, RES1, RES2, RES3
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end_func __umulsidi2
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;; FIXME: Add a hardware version of this function.
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fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_hw32
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fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_hw32
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#elif defined MUL_F5
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/* The F5xxx series of MCUs support the same 16-bit and 32-bit multiply
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as the second generation hardware, but they are accessed from different
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memory registers. */
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start_func __mulhi2_f5 __mspabi_mpyi __mspabi_mpyi_f5hw
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mult16 0x04C0, 0x04C8, 0x04CA
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mult16 MPY_F5, OP2_F5, RESLO_F5
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end_func __mulhi2_f5
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start_func __mulsihi2 __mspabi_mpysl __mspabi_mpysl_f5hw
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mult1632 0x04C2, 0x04C8, 0x04CA, 0x04CC
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end_func __mulsihi2
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start_func __umulsihi2 __mspabi_mpyul _mspabi_mpyul_f5hw
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mult1632 0x04C0, 0x04C8, 0x04CA, 0x04CC
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end_func __umulsihi2
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start_func __mulhisi2 __mspabi_mpysl __mspabi_mpysl_f5hw
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mult1632 MPYS_F5, OP2_F5, RESLO_F5, RESHI_F5
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end_func __mulhisi2
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start_func __umulhisi2 __mspabi_mpyul __mspabi_mpyul_f5hw
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mult1632 MPY_F5, OP2_F5, RESLO_F5, RESHI_F5
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end_func __umulhisi2
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start_func __mulsi2_f5 __mspabi_mpyl __mspabi_mpyl_f5hw
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mult32_hw 0x04D0, 0x04D2, 0x04E0, 0x04E2, 0x04E4, 0x04E6
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mult32_hw MPY32L_F5, MPY32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5
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end_func __mulsi2_f5
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start_func __muldisi2 __mspabi_mpysll __mspabi_mpysll_f5hw
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mult3264_hw 0x04D4, 0x04D6, 0x04E0, 0x04E2, 0x04E4, 0x04E6, 0x04E8, 0x04EA
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end_func __muldisi2
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start_func __umuldisi2 __mspabi_mpyull __mspabi_mpyull_f5hw
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mult3264_hw 0x04D0, 0x04D2, 0x04E0, 0x04E2, 0x04E4, 0x04E6, 0x04E8, 0x04EA
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end_func __umuldisi2
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start_func __mulsidi2 __mspabi_mpysll __mspabi_mpysll_f5hw
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mult3264_hw MPYS32L_F5, MPYS32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5, RES2_F5, RES3_F5
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end_func __mulsidi2
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start_func __umulsidi2 __mspabi_mpyull __mspabi_mpyull_f5hw
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mult3264_hw MPY32L_F5, MPY32H_F5, OP2L_F5, OP2H_F5, RES0_F5, RES1_F5, RES2_F5, RES3_F5
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end_func __umulsidi2
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;; FIXME: Add a hardware version of this function.
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fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_f5hw
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fake_func __muldi3 __mspabi_mpyll __mspabi_mpyll_f5hw
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#else
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#error MUL type not defined
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@ -46,6 +46,9 @@ typedef unsigned int uint08_type __attribute__ ((mode (QI)));
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#elif defined MUL_16
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/* The 16-bit multiply library needs a software version of SI->DI widening
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multiplication. */
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signed long long
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__mspabi_mpysll (signed long a, signed long b)
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{
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