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Daily bump.
This commit is contained in:
GCC Administrator
parent
85307b4e93
commit
8e97b9052d
@ -1,3 +1,10 @@
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2020-10-06 Tobias Burnus <tobias@codesourcery.com>
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PR target/97302
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* configure.ac: Only set with_gmp to /usr/local
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if not building in tree.
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* configure: Regenerate.
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2020-09-18 Omar Tahir <omar.tahir@arm.com>
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* MAINTAINERS (Write After Approval): Add myself.
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664
gcc/ChangeLog
664
gcc/ChangeLog
@ -1,3 +1,667 @@
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2020-10-06 Andrew MacLeod <amacleod@redhat.com>
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* flag-types.h (enum evrp_mode): New enumerated type EVRP_MODE_*.
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* common.opt (fevrp-mode): New undocumented flag.
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* gimple-ssa-evrp.c: Include gimple-range.h
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(class rvrp_folder): EVRP folding using ranger exclusively.
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(rvrp_folder::rvrp_folder): New.
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(rvrp_folder::~rvrp_folder): New.
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(rvrp_folder::value_of_expr): New. Use rangers value_of_expr.
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(rvrp_folder::value_on_edge): New. Use rangers value_on_edge.
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(rvrp_folder::value_of_Stmt): New. Use rangers value_of_stmt.
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(rvrp_folder::fold_stmt): New. Call the simplifier.
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(class hybrid_folder): EVRP folding using both engines.
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(hybrid_folder::hybrid_folder): New.
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(hybrid_folder::~hybrid_folder): New.
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(hybrid_folder::fold_stmt): New. Simplify with one engne, then the
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other.
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(hybrid_folder::value_of_expr): New. Use both value routines.
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(hybrid_folder::value_on_edge): New. Use both value routines.
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(hybrid_folder::value_of_stmt): New. Use both value routines.
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(hybrid_folder::choose_value): New. Choose between range_analzyer and
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rangers values.
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(execute_early_vrp): Choose a folder based on flag_evrp_mode.
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* vr-values.c (simplify_using_ranges::fold_cond): Try range_of_stmt
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first to see if it returns a value.
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(simplify_using_ranges::simplify_switch_using_ranges): Return true if
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any changes were made to the switch.
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2020-10-06 Andrew MacLeod <amacleod@redhat.com>
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* Makefile.in (OBJS): Add gimple-range*.o.
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* gimple-range.h: New file.
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* gimple-range.cc: New file.
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* gimple-range-cache.h: New file.
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* gimple-range-cache.cc: New file.
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* gimple-range-edge.h: New file.
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* gimple-range-edge.cc: New file.
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* gimple-range-gori.h: New file.
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* gimple-range-gori.cc: New file.
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2020-10-06 Dennis Zhang <dennis.zhang@arm.com>
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* config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes.
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2020-10-06 Tom de Vries <tdevries@suse.de>
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PR middle-end/90861
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* gimplify.c (gimplify_bind_expr): Handle lookup in
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oacc_declare_returns using key with decl-expr.
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2020-10-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
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* config/arm/iterators.md (MVE_types): Move mode iterator from mve.md to
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iterators.md.
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(MVE_VLD_ST): Likewise.
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(MVE_0): Likewise.
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(MVE_1): Likewise.
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(MVE_3): Likewise.
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(MVE_2): Likewise.
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(MVE_5): Likewise.
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(MVE_6): Likewise.
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(MVE_CNVT): Move mode attribute iterator from mve.md to iterators.md.
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(MVE_LANES): Likewise.
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(MVE_constraint): Likewise.
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(MVE_constraint1): Likewise.
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(MVE_constraint2): Likewise.
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(MVE_constraint3): Likewise.
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(MVE_pred): Likewise.
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(MVE_pred1): Likewise.
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(MVE_pred2): Likewise.
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(MVE_pred3): Likewise.
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(MVE_B_ELEM): Likewise.
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(MVE_H_ELEM): Likewise.
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(V_sz_elem1): Likewise.
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(V_extr_elem): Likewise.
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(earlyclobber_32): Likewise.
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(supf): Move int attribute from mve.md to iterators.md.
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(mode1): Likewise.
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(VCVTQ_TO_F): Move int iterator from mve.md to iterators.md.
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(VMVNQ_N): Likewise.
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(VREV64Q): Likewise.
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(VCVTQ_FROM_F): Likewise.
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(VREV16Q): Likewise.
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(VCVTAQ): Likewise.
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(VMVNQ): Likewise.
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(VDUPQ_N): Likewise.
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(VCLZQ): Likewise.
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(VADDVQ): Likewise.
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(VREV32Q): Likewise.
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(VMOVLBQ): Likewise.
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(VMOVLTQ): Likewise.
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(VCVTPQ): Likewise.
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(VCVTNQ): Likewise.
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(VCVTMQ): Likewise.
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(VADDLVQ): Likewise.
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(VCTPQ): Likewise.
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(VCTPQ_M): Likewise.
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(VCVTQ_N_TO_F): Likewise.
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(VCREATEQ): Likewise.
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(VSHRQ_N): Likewise.
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(VCVTQ_N_FROM_F): Likewise.
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(VADDLVQ_P): Likewise.
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(VCMPNEQ): Likewise.
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(VSHLQ): Likewise.
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(VABDQ): Likewise.
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(VADDQ_N): Likewise.
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(VADDVAQ): Likewise.
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(VADDVQ_P): Likewise.
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(VANDQ): Likewise.
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(VBICQ): Likewise.
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(VBRSRQ_N): Likewise.
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(VCADDQ_ROT270): Likewise.
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(VCADDQ_ROT90): Likewise.
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(VCMPEQQ): Likewise.
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(VCMPEQQ_N): Likewise.
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(VCMPNEQ_N): Likewise.
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(VEORQ): Likewise.
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(VHADDQ): Likewise.
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(VHADDQ_N): Likewise.
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(VHSUBQ): Likewise.
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(VHSUBQ_N): Likewise.
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(VMAXQ): Likewise.
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(VMAXVQ): Likewise.
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(VMINQ): Likewise.
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(VMINVQ): Likewise.
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(VMLADAVQ): Likewise.
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(VMULHQ): Likewise.
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(VMULLBQ_INT): Likewise.
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(VMULLTQ_INT): Likewise.
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(VMULQ): Likewise.
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(VMULQ_N): Likewise.
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(VORNQ): Likewise.
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(VORRQ): Likewise.
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(VQADDQ): Likewise.
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(VQADDQ_N): Likewise.
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(VQRSHLQ): Likewise.
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(VQRSHLQ_N): Likewise.
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(VQSHLQ): Likewise.
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(VQSHLQ_N): Likewise.
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(VQSHLQ_R): Likewise.
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(VQSUBQ): Likewise.
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(VQSUBQ_N): Likewise.
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(VRHADDQ): Likewise.
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(VRMULHQ): Likewise.
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(VRSHLQ): Likewise.
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(VRSHLQ_N): Likewise.
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(VRSHRQ_N): Likewise.
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(VSHLQ_N): Likewise.
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(VSHLQ_R): Likewise.
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(VSUBQ): Likewise.
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(VSUBQ_N): Likewise.
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(VADDLVAQ): Likewise.
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(VBICQ_N): Likewise.
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(VMLALDAVQ): Likewise.
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(VMLALDAVXQ): Likewise.
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(VMOVNBQ): Likewise.
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(VMOVNTQ): Likewise.
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(VORRQ_N): Likewise.
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(VQMOVNBQ): Likewise.
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(VQMOVNTQ): Likewise.
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(VSHLLBQ_N): Likewise.
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(VSHLLTQ_N): Likewise.
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(VRMLALDAVHQ): Likewise.
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(VBICQ_M_N): Likewise.
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(VCVTAQ_M): Likewise.
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(VCVTQ_M_TO_F): Likewise.
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(VQRSHRNBQ_N): Likewise.
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(VABAVQ): Likewise.
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(VSHLCQ): Likewise.
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(VRMLALDAVHAQ): Likewise.
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(VADDVAQ_P): Likewise.
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(VCLZQ_M): Likewise.
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(VCMPEQQ_M_N): Likewise.
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(VCMPEQQ_M): Likewise.
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(VCMPNEQ_M_N): Likewise.
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(VCMPNEQ_M): Likewise.
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(VDUPQ_M_N): Likewise.
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(VMAXVQ_P): Likewise.
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(VMINVQ_P): Likewise.
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(VMLADAVAQ): Likewise.
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(VMLADAVQ_P): Likewise.
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(VMLAQ_N): Likewise.
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(VMLASQ_N): Likewise.
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(VMVNQ_M): Likewise.
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(VPSELQ): Likewise.
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(VQDMLAHQ_N): Likewise.
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(VQRDMLAHQ_N): Likewise.
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(VQRDMLASHQ_N): Likewise.
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(VQRSHLQ_M_N): Likewise.
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(VQSHLQ_M_R): Likewise.
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(VREV64Q_M): Likewise.
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(VRSHLQ_M_N): Likewise.
|
||||
(VSHLQ_M_R): Likewise.
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(VSLIQ_N): Likewise.
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(VSRIQ_N): Likewise.
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(VMLALDAVQ_P): Likewise.
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(VQMOVNBQ_M): Likewise.
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(VMOVLTQ_M): Likewise.
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(VMOVNBQ_M): Likewise.
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(VRSHRNTQ_N): Likewise.
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||||
(VORRQ_M_N): Likewise.
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(VREV32Q_M): Likewise.
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||||
(VREV16Q_M): Likewise.
|
||||
(VQRSHRNTQ_N): Likewise.
|
||||
(VMOVNTQ_M): Likewise.
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||||
(VMOVLBQ_M): Likewise.
|
||||
(VMLALDAVAQ): Likewise.
|
||||
(VQSHRNBQ_N): Likewise.
|
||||
(VSHRNBQ_N): Likewise.
|
||||
(VRSHRNBQ_N): Likewise.
|
||||
(VMLALDAVXQ_P): Likewise.
|
||||
(VQMOVNTQ_M): Likewise.
|
||||
(VMVNQ_M_N): Likewise.
|
||||
(VQSHRNTQ_N): Likewise.
|
||||
(VMLALDAVAXQ): Likewise.
|
||||
(VSHRNTQ_N): Likewise.
|
||||
(VCVTMQ_M): Likewise.
|
||||
(VCVTNQ_M): Likewise.
|
||||
(VCVTPQ_M): Likewise.
|
||||
(VCVTQ_M_N_FROM_F): Likewise.
|
||||
(VCVTQ_M_FROM_F): Likewise.
|
||||
(VRMLALDAVHQ_P): Likewise.
|
||||
(VADDLVAQ_P): Likewise.
|
||||
(VABAVQ_P): Likewise.
|
||||
(VSHLQ_M): Likewise.
|
||||
(VSRIQ_M_N): Likewise.
|
||||
(VSUBQ_M): Likewise.
|
||||
(VCVTQ_M_N_TO_F): Likewise.
|
||||
(VHSUBQ_M): Likewise.
|
||||
(VSLIQ_M_N): Likewise.
|
||||
(VRSHLQ_M): Likewise.
|
||||
(VMINQ_M): Likewise.
|
||||
(VMULLBQ_INT_M): Likewise.
|
||||
(VMULHQ_M): Likewise.
|
||||
(VMULQ_M): Likewise.
|
||||
(VHSUBQ_M_N): Likewise.
|
||||
(VHADDQ_M_N): Likewise.
|
||||
(VORRQ_M): Likewise.
|
||||
(VRMULHQ_M): Likewise.
|
||||
(VQADDQ_M): Likewise.
|
||||
(VRSHRQ_M_N): Likewise.
|
||||
(VQSUBQ_M_N): Likewise.
|
||||
(VADDQ_M): Likewise.
|
||||
(VORNQ_M): Likewise.
|
||||
(VRHADDQ_M): Likewise.
|
||||
(VQSHLQ_M): Likewise.
|
||||
(VANDQ_M): Likewise.
|
||||
(VBICQ_M): Likewise.
|
||||
(VSHLQ_M_N): Likewise.
|
||||
(VCADDQ_ROT270_M): Likewise.
|
||||
(VQRSHLQ_M): Likewise.
|
||||
(VQADDQ_M_N): Likewise.
|
||||
(VADDQ_M_N): Likewise.
|
||||
(VMAXQ_M): Likewise.
|
||||
(VQSUBQ_M): Likewise.
|
||||
(VMLASQ_M_N): Likewise.
|
||||
(VMLADAVAQ_P): Likewise.
|
||||
(VBRSRQ_M_N): Likewise.
|
||||
(VMULQ_M_N): Likewise.
|
||||
(VCADDQ_ROT90_M): Likewise.
|
||||
(VMULLTQ_INT_M): Likewise.
|
||||
(VEORQ_M): Likewise.
|
||||
(VSHRQ_M_N): Likewise.
|
||||
(VSUBQ_M_N): Likewise.
|
||||
(VHADDQ_M): Likewise.
|
||||
(VABDQ_M): Likewise.
|
||||
(VMLAQ_M_N): Likewise.
|
||||
(VQSHLQ_M_N): Likewise.
|
||||
(VMLALDAVAQ_P): Likewise.
|
||||
(VMLALDAVAXQ_P): Likewise.
|
||||
(VQRSHRNBQ_M_N): Likewise.
|
||||
(VQRSHRNTQ_M_N): Likewise.
|
||||
(VQSHRNBQ_M_N): Likewise.
|
||||
(VQSHRNTQ_M_N): Likewise.
|
||||
(VRSHRNBQ_M_N): Likewise.
|
||||
(VRSHRNTQ_M_N): Likewise.
|
||||
(VSHLLBQ_M_N): Likewise.
|
||||
(VSHLLTQ_M_N): Likewise.
|
||||
(VSHRNBQ_M_N): Likewise.
|
||||
(VSHRNTQ_M_N): Likewise.
|
||||
(VSTRWSBQ): Likewise.
|
||||
(VSTRBSOQ): Likewise.
|
||||
(VSTRBQ): Likewise.
|
||||
(VLDRBGOQ): Likewise.
|
||||
(VLDRBQ): Likewise.
|
||||
(VLDRWGBQ): Likewise.
|
||||
(VLD1Q): Likewise.
|
||||
(VLDRHGOQ): Likewise.
|
||||
(VLDRHGSOQ): Likewise.
|
||||
(VLDRHQ): Likewise.
|
||||
(VLDRWQ): Likewise.
|
||||
(VLDRDGBQ): Likewise.
|
||||
(VLDRDGOQ): Likewise.
|
||||
(VLDRDGSOQ): Likewise.
|
||||
(VLDRWGOQ): Likewise.
|
||||
(VLDRWGSOQ): Likewise.
|
||||
(VST1Q): Likewise.
|
||||
(VSTRHSOQ): Likewise.
|
||||
(VSTRHSSOQ): Likewise.
|
||||
(VSTRHQ): Likewise.
|
||||
(VSTRWQ): Likewise.
|
||||
(VSTRDSBQ): Likewise.
|
||||
(VSTRDSOQ): Likewise.
|
||||
(VSTRDSSOQ): Likewise.
|
||||
(VSTRWSOQ): Likewise.
|
||||
(VSTRWSSOQ): Likewise.
|
||||
(VSTRWSBWBQ): Likewise.
|
||||
(VLDRWGBWBQ): Likewise.
|
||||
(VSTRDSBWBQ): Likewise.
|
||||
(VLDRDGBWBQ): Likewise.
|
||||
(VADCIQ): Likewise.
|
||||
(VADCIQ_M): Likewise.
|
||||
(VSBCQ): Likewise.
|
||||
(VSBCQ_M): Likewise.
|
||||
(VSBCIQ): Likewise.
|
||||
(VSBCIQ_M): Likewise.
|
||||
(VADCQ): Likewise.
|
||||
(VADCQ_M): Likewise.
|
||||
(UQRSHLLQ): Likewise.
|
||||
(SQRSHRLQ): Likewise.
|
||||
(VSHLCQ_M): Likewise.
|
||||
* config/arm/mve.md (MVE_types): Move mode iterator to iterators.md from mve.md.
|
||||
(MVE_VLD_ST): Likewise.
|
||||
(MVE_0): Likewise.
|
||||
(MVE_1): Likewise.
|
||||
(MVE_3): Likewise.
|
||||
(MVE_2): Likewise.
|
||||
(MVE_5): Likewise.
|
||||
(MVE_6): Likewise.
|
||||
(MVE_CNVT): Move mode attribute iterator to iterators.md from mve.md.
|
||||
(MVE_LANES): Likewise.
|
||||
(MVE_constraint): Likewise.
|
||||
(MVE_constraint1): Likewise.
|
||||
(MVE_constraint2): Likewise.
|
||||
(MVE_constraint3): Likewise.
|
||||
(MVE_pred): Likewise.
|
||||
(MVE_pred1): Likewise.
|
||||
(MVE_pred2): Likewise.
|
||||
(MVE_pred3): Likewise.
|
||||
(MVE_B_ELEM): Likewise.
|
||||
(MVE_H_ELEM): Likewise.
|
||||
(V_sz_elem1): Likewise.
|
||||
(V_extr_elem): Likewise.
|
||||
(earlyclobber_32): Likewise.
|
||||
(supf): Move int attribute to iterators.md from mve.md.
|
||||
(mode1): Likewise.
|
||||
(VCVTQ_TO_F): Move int iterator to iterators.md from mve.md.
|
||||
(VMVNQ_N): Likewise.
|
||||
(VREV64Q): Likewise.
|
||||
(VCVTQ_FROM_F): Likewise.
|
||||
(VREV16Q): Likewise.
|
||||
(VCVTAQ): Likewise.
|
||||
(VMVNQ): Likewise.
|
||||
(VDUPQ_N): Likewise.
|
||||
(VCLZQ): Likewise.
|
||||
(VADDVQ): Likewise.
|
||||
(VREV32Q): Likewise.
|
||||
(VMOVLBQ): Likewise.
|
||||
(VMOVLTQ): Likewise.
|
||||
(VCVTPQ): Likewise.
|
||||
(VCVTNQ): Likewise.
|
||||
(VCVTMQ): Likewise.
|
||||
(VADDLVQ): Likewise.
|
||||
(VCTPQ): Likewise.
|
||||
(VCTPQ_M): Likewise.
|
||||
(VCVTQ_N_TO_F): Likewise.
|
||||
(VCREATEQ): Likewise.
|
||||
(VSHRQ_N): Likewise.
|
||||
(VCVTQ_N_FROM_F): Likewise.
|
||||
(VADDLVQ_P): Likewise.
|
||||
(VCMPNEQ): Likewise.
|
||||
(VSHLQ): Likewise.
|
||||
(VABDQ): Likewise.
|
||||
(VADDQ_N): Likewise.
|
||||
(VADDVAQ): Likewise.
|
||||
(VADDVQ_P): Likewise.
|
||||
(VANDQ): Likewise.
|
||||
(VBICQ): Likewise.
|
||||
(VBRSRQ_N): Likewise.
|
||||
(VCADDQ_ROT270): Likewise.
|
||||
(VCADDQ_ROT90): Likewise.
|
||||
(VCMPEQQ): Likewise.
|
||||
(VCMPEQQ_N): Likewise.
|
||||
(VCMPNEQ_N): Likewise.
|
||||
(VEORQ): Likewise.
|
||||
(VHADDQ): Likewise.
|
||||
(VHADDQ_N): Likewise.
|
||||
(VHSUBQ): Likewise.
|
||||
(VHSUBQ_N): Likewise.
|
||||
(VMAXQ): Likewise.
|
||||
(VMAXVQ): Likewise.
|
||||
(VMINQ): Likewise.
|
||||
(VMINVQ): Likewise.
|
||||
(VMLADAVQ): Likewise.
|
||||
(VMULHQ): Likewise.
|
||||
(VMULLBQ_INT): Likewise.
|
||||
(VMULLTQ_INT): Likewise.
|
||||
(VMULQ): Likewise.
|
||||
(VMULQ_N): Likewise.
|
||||
(VORNQ): Likewise.
|
||||
(VORRQ): Likewise.
|
||||
(VQADDQ): Likewise.
|
||||
(VQADDQ_N): Likewise.
|
||||
(VQRSHLQ): Likewise.
|
||||
(VQRSHLQ_N): Likewise.
|
||||
(VQSHLQ): Likewise.
|
||||
(VQSHLQ_N): Likewise.
|
||||
(VQSHLQ_R): Likewise.
|
||||
(VQSUBQ): Likewise.
|
||||
(VQSUBQ_N): Likewise.
|
||||
(VRHADDQ): Likewise.
|
||||
(VRMULHQ): Likewise.
|
||||
(VRSHLQ): Likewise.
|
||||
(VRSHLQ_N): Likewise.
|
||||
(VRSHRQ_N): Likewise.
|
||||
(VSHLQ_N): Likewise.
|
||||
(VSHLQ_R): Likewise.
|
||||
(VSUBQ): Likewise.
|
||||
(VSUBQ_N): Likewise.
|
||||
(VADDLVAQ): Likewise.
|
||||
(VBICQ_N): Likewise.
|
||||
(VMLALDAVQ): Likewise.
|
||||
(VMLALDAVXQ): Likewise.
|
||||
(VMOVNBQ): Likewise.
|
||||
(VMOVNTQ): Likewise.
|
||||
(VORRQ_N): Likewise.
|
||||
(VQMOVNBQ): Likewise.
|
||||
(VQMOVNTQ): Likewise.
|
||||
(VSHLLBQ_N): Likewise.
|
||||
(VSHLLTQ_N): Likewise.
|
||||
(VRMLALDAVHQ): Likewise.
|
||||
(VBICQ_M_N): Likewise.
|
||||
(VCVTAQ_M): Likewise.
|
||||
(VCVTQ_M_TO_F): Likewise.
|
||||
(VQRSHRNBQ_N): Likewise.
|
||||
(VABAVQ): Likewise.
|
||||
(VSHLCQ): Likewise.
|
||||
(VRMLALDAVHAQ): Likewise.
|
||||
(VADDVAQ_P): Likewise.
|
||||
(VCLZQ_M): Likewise.
|
||||
(VCMPEQQ_M_N): Likewise.
|
||||
(VCMPEQQ_M): Likewise.
|
||||
(VCMPNEQ_M_N): Likewise.
|
||||
(VCMPNEQ_M): Likewise.
|
||||
(VDUPQ_M_N): Likewise.
|
||||
(VMAXVQ_P): Likewise.
|
||||
(VMINVQ_P): Likewise.
|
||||
(VMLADAVAQ): Likewise.
|
||||
(VMLADAVQ_P): Likewise.
|
||||
(VMLAQ_N): Likewise.
|
||||
(VMLASQ_N): Likewise.
|
||||
(VMVNQ_M): Likewise.
|
||||
(VPSELQ): Likewise.
|
||||
(VQDMLAHQ_N): Likewise.
|
||||
(VQRDMLAHQ_N): Likewise.
|
||||
(VQRDMLASHQ_N): Likewise.
|
||||
(VQRSHLQ_M_N): Likewise.
|
||||
(VQSHLQ_M_R): Likewise.
|
||||
(VREV64Q_M): Likewise.
|
||||
(VRSHLQ_M_N): Likewise.
|
||||
(VSHLQ_M_R): Likewise.
|
||||
(VSLIQ_N): Likewise.
|
||||
(VSRIQ_N): Likewise.
|
||||
(VMLALDAVQ_P): Likewise.
|
||||
(VQMOVNBQ_M): Likewise.
|
||||
(VMOVLTQ_M): Likewise.
|
||||
(VMOVNBQ_M): Likewise.
|
||||
(VRSHRNTQ_N): Likewise.
|
||||
(VORRQ_M_N): Likewise.
|
||||
(VREV32Q_M): Likewise.
|
||||
(VREV16Q_M): Likewise.
|
||||
(VQRSHRNTQ_N): Likewise.
|
||||
(VMOVNTQ_M): Likewise.
|
||||
(VMOVLBQ_M): Likewise.
|
||||
(VMLALDAVAQ): Likewise.
|
||||
(VQSHRNBQ_N): Likewise.
|
||||
(VSHRNBQ_N): Likewise.
|
||||
(VRSHRNBQ_N): Likewise.
|
||||
(VMLALDAVXQ_P): Likewise.
|
||||
(VQMOVNTQ_M): Likewise.
|
||||
(VMVNQ_M_N): Likewise.
|
||||
(VQSHRNTQ_N): Likewise.
|
||||
(VMLALDAVAXQ): Likewise.
|
||||
(VSHRNTQ_N): Likewise.
|
||||
(VCVTMQ_M): Likewise.
|
||||
(VCVTNQ_M): Likewise.
|
||||
(VCVTPQ_M): Likewise.
|
||||
(VCVTQ_M_N_FROM_F): Likewise.
|
||||
(VCVTQ_M_FROM_F): Likewise.
|
||||
(VRMLALDAVHQ_P): Likewise.
|
||||
(VADDLVAQ_P): Likewise.
|
||||
(VABAVQ_P): Likewise.
|
||||
(VSHLQ_M): Likewise.
|
||||
(VSRIQ_M_N): Likewise.
|
||||
(VSUBQ_M): Likewise.
|
||||
(VCVTQ_M_N_TO_F): Likewise.
|
||||
(VHSUBQ_M): Likewise.
|
||||
(VSLIQ_M_N): Likewise.
|
||||
(VRSHLQ_M): Likewise.
|
||||
(VMINQ_M): Likewise.
|
||||
(VMULLBQ_INT_M): Likewise.
|
||||
(VMULHQ_M): Likewise.
|
||||
(VMULQ_M): Likewise.
|
||||
(VHSUBQ_M_N): Likewise.
|
||||
(VHADDQ_M_N): Likewise.
|
||||
(VORRQ_M): Likewise.
|
||||
(VRMULHQ_M): Likewise.
|
||||
(VQADDQ_M): Likewise.
|
||||
(VRSHRQ_M_N): Likewise.
|
||||
(VQSUBQ_M_N): Likewise.
|
||||
(VADDQ_M): Likewise.
|
||||
(VORNQ_M): Likewise.
|
||||
(VRHADDQ_M): Likewise.
|
||||
(VQSHLQ_M): Likewise.
|
||||
(VANDQ_M): Likewise.
|
||||
(VBICQ_M): Likewise.
|
||||
(VSHLQ_M_N): Likewise.
|
||||
(VCADDQ_ROT270_M): Likewise.
|
||||
(VQRSHLQ_M): Likewise.
|
||||
(VQADDQ_M_N): Likewise.
|
||||
(VADDQ_M_N): Likewise.
|
||||
(VMAXQ_M): Likewise.
|
||||
(VQSUBQ_M): Likewise.
|
||||
(VMLASQ_M_N): Likewise.
|
||||
(VMLADAVAQ_P): Likewise.
|
||||
(VBRSRQ_M_N): Likewise.
|
||||
(VMULQ_M_N): Likewise.
|
||||
(VCADDQ_ROT90_M): Likewise.
|
||||
(VMULLTQ_INT_M): Likewise.
|
||||
(VEORQ_M): Likewise.
|
||||
(VSHRQ_M_N): Likewise.
|
||||
(VSUBQ_M_N): Likewise.
|
||||
(VHADDQ_M): Likewise.
|
||||
(VABDQ_M): Likewise.
|
||||
(VMLAQ_M_N): Likewise.
|
||||
(VQSHLQ_M_N): Likewise.
|
||||
(VMLALDAVAQ_P): Likewise.
|
||||
(VMLALDAVAXQ_P): Likewise.
|
||||
(VQRSHRNBQ_M_N): Likewise.
|
||||
(VQRSHRNTQ_M_N): Likewise.
|
||||
(VQSHRNBQ_M_N): Likewise.
|
||||
(VQSHRNTQ_M_N): Likewise.
|
||||
(VRSHRNBQ_M_N): Likewise.
|
||||
(VRSHRNTQ_M_N): Likewise.
|
||||
(VSHLLBQ_M_N): Likewise.
|
||||
(VSHLLTQ_M_N): Likewise.
|
||||
(VSHRNBQ_M_N): Likewise.
|
||||
(VSHRNTQ_M_N): Likewise.
|
||||
(VSTRWSBQ): Likewise.
|
||||
(VSTRBSOQ): Likewise.
|
||||
(VSTRBQ): Likewise.
|
||||
(VLDRBGOQ): Likewise.
|
||||
(VLDRBQ): Likewise.
|
||||
(VLDRWGBQ): Likewise.
|
||||
(VLD1Q): Likewise.
|
||||
(VLDRHGOQ): Likewise.
|
||||
(VLDRHGSOQ): Likewise.
|
||||
(VLDRHQ): Likewise.
|
||||
(VLDRWQ): Likewise.
|
||||
(VLDRDGBQ): Likewise.
|
||||
(VLDRDGOQ): Likewise.
|
||||
(VLDRDGSOQ): Likewise.
|
||||
(VLDRWGOQ): Likewise.
|
||||
(VLDRWGSOQ): Likewise.
|
||||
(VST1Q): Likewise.
|
||||
(VSTRHSOQ): Likewise.
|
||||
(VSTRHSSOQ): Likewise.
|
||||
(VSTRHQ): Likewise.
|
||||
(VSTRWQ): Likewise.
|
||||
(VSTRDSBQ): Likewise.
|
||||
(VSTRDSOQ): Likewise.
|
||||
(VSTRDSSOQ): Likewise.
|
||||
(VSTRWSOQ): Likewise.
|
||||
(VSTRWSSOQ): Likewise.
|
||||
(VSTRWSBWBQ): Likewise.
|
||||
(VLDRWGBWBQ): Likewise.
|
||||
(VSTRDSBWBQ): Likewise.
|
||||
(VLDRDGBWBQ): Likewise.
|
||||
(VADCIQ): Likewise.
|
||||
(VADCIQ_M): Likewise.
|
||||
(VSBCQ): Likewise.
|
||||
(VSBCQ_M): Likewise.
|
||||
(VSBCIQ): Likewise.
|
||||
(VSBCIQ_M): Likewise.
|
||||
(VADCQ): Likewise.
|
||||
(VADCQ_M): Likewise.
|
||||
(UQRSHLLQ): Likewise.
|
||||
(SQRSHRLQ): Likewise.
|
||||
(VSHLCQ_M): Likewise.
|
||||
(define_c_enum "unspec"): Move MVE enumerator to unspecs.md from mve.md.
|
||||
* config/arm/unspecs.md (define_c_enum "unspec"): Move MVE enumerator from
|
||||
mve.md to unspecs.md.
|
||||
|
||||
2020-10-06 Martin Liska <mliska@suse.cz>
|
||||
|
||||
* common.opt: Remove -fdbg-cnt-list from deferred options.
|
||||
* dbgcnt.c (dbg_cnt_set_limit_by_index): Make a copy
|
||||
to original_limits.
|
||||
(dbg_cnt_list_all_counters): Print also current counter value
|
||||
and print to stderr.
|
||||
* opts-global.c (handle_common_deferred_options): Do not handle
|
||||
-fdbg-cnt-list.
|
||||
* opts.c (common_handle_option): Likewise.
|
||||
* toplev.c (finalize): Handle it after compilation here.
|
||||
|
||||
2020-10-06 Martin Liska <mliska@suse.cz>
|
||||
|
||||
* dbgcnt.c (dbg_cnt): Report also upper limit.
|
||||
|
||||
2020-10-06 Tom de Vries <tdevries@suse.de>
|
||||
|
||||
* tracer.c (count_insns): Rename to ...
|
||||
(analyze_bb): ... this.
|
||||
(cache_can_duplicate_bb_p, cached_can_duplicate_bb_p): New function.
|
||||
(ignore_bb_p): Use cached_can_duplicate_bb_p.
|
||||
(tail_duplicate): Call cache_can_duplicate_bb_p.
|
||||
|
||||
2020-10-06 Tom de Vries <tdevries@suse.de>
|
||||
|
||||
* tracer.c (can_duplicate_insn_p, can_duplicate_bb_no_insn_iter_p)
|
||||
(can_duplicate_bb_p): New function, factored out of ...
|
||||
(ignore_bb_p): ... here.
|
||||
|
||||
2020-10-06 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR rtl-optimization/97282
|
||||
* tree-ssa-math-opts.c (divmod_candidate_p): Don't return false for
|
||||
constant op2 if it is not a power of two and the type has precision
|
||||
larger than HOST_BITS_PER_WIDE_INT or BITS_PER_WORD.
|
||||
* internal-fn.c (contains_call_div_mod): New function.
|
||||
(expand_DIVMOD): If last argument is a constant, try to expand it as
|
||||
TRUNC_DIV_EXPR followed by TRUNC_MOD_EXPR, but if the sequence
|
||||
contains any calls or {,U}{DIV,MOD} rtxes, throw it away and use
|
||||
divmod optab or divmod libfunc.
|
||||
|
||||
2020-10-06 Aldy Hernandez <aldyh@redhat.com>
|
||||
|
||||
* value-range.h (irange_allocator::allocate): Increase
|
||||
newir storage by one.
|
||||
|
||||
2020-10-06 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR middle-end/97289
|
||||
* omp-offload.c (omp_discover_declare_target_tgt_fn_r): Only follow
|
||||
node->alias_target if it is a FUNCTION_DECL.
|
||||
|
||||
2020-10-06 Joe Ramsay <joe.ramsay@arm.com>
|
||||
|
||||
* config/arm/arm-cpus.in:
|
||||
(ALL_FPU_INTERNAL): Remove vfp_base.
|
||||
(VFPv2): Remove vfp_base.
|
||||
(MVE): Remove vfp_base.
|
||||
(vfp_base): Redefine as implied bit dependent on MVE or FP
|
||||
(cortex-m55): Add flags to disable MVE, MVE FP, FP and DSP extensions.
|
||||
* config/arm/arm.c (arm_configure_build_target): Add implied bits to ISA.
|
||||
* config/arm/parsecpu.awk:
|
||||
(gen_isa): Print implied bits and their dependencies to ISA header.
|
||||
(gen_data): Add parsing for implied feature bits.
|
||||
|
||||
2020-10-06 Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
|
||||
* doc/invoke.texi: Add z15/arch13 to the list of documented
|
||||
-march/-mtune options.
|
||||
|
||||
2020-10-05 Dennis Zhang <dennis.zhang@arm.com>
|
||||
|
||||
* config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes.
|
||||
|
||||
@ -1 +1 @@
|
||||
20201006
|
||||
20201007
|
||||
|
||||
@ -1,3 +1,10 @@
|
||||
2020-10-06 Marek Polacek <polacek@redhat.com>
|
||||
|
||||
PR c++/97297
|
||||
* parser.c (cp_parser_direct_declarator): When checking if a
|
||||
name is a function template declaration for the P0634R3 case,
|
||||
look in uninstantiated templates too.
|
||||
|
||||
2020-10-05 Marek Polacek <polacek@redhat.com>
|
||||
|
||||
* cp-tree.h (NON_UNION_CLASS_TYPE_P): Fix typo in a comment.
|
||||
|
||||
@ -1,3 +1,58 @@
|
||||
2020-10-06 Marek Polacek <polacek@redhat.com>
|
||||
|
||||
PR c++/97297
|
||||
* g++.dg/cpp2a/typename18.C: New test.
|
||||
|
||||
2020-10-06 Tobias Burnus <tobias@codesourcery.com>
|
||||
|
||||
PR middle-end/90861
|
||||
* c-c++-common/goacc/declare-pr90861.c: Remove xfail.
|
||||
|
||||
2020-10-06 Andrew MacLeod <amacleod@redhat.com>
|
||||
|
||||
* gcc.dg/pr81192.c: Disable EVRP pass.
|
||||
* gcc.dg/tree-ssa/pr77445-2.c: Ditto.
|
||||
* gcc.dg/tree-ssa/ssa-dom-thread-6.c: Adjust.
|
||||
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Ditto.
|
||||
|
||||
2020-10-06 Dennis Zhang <dennis.zhang@arm.com>
|
||||
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c: Use additional
|
||||
option -fno-ipa-icf and change the instruction count from 8 to 16.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_f32.c: Likewise.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_s16.c: Likewise.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_s32.c: Likewise.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_s64.c: Likewise.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_s8.c: Likewise.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_u16.c: Likewise.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_u32.c: Likewise.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_u64.c: Likewise.
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_u8.c: Likewise.
|
||||
|
||||
2020-10-06 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR rtl-optimization/97282
|
||||
* gcc.target/i386/pr97282.c: New test.
|
||||
|
||||
2020-10-06 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR middle-end/97289
|
||||
* c-c++-common/gomp/pr97289.c: New test.
|
||||
|
||||
2020-10-06 Joe Ramsay <Joe.Ramsay@arm.com>
|
||||
|
||||
* gcc.target/arm/cortex-m55-nodsp-flag-hard.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nodsp-flag-softfp.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nofp-flag-hard.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nofp-flag-softfp.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nomve-flag-hard.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nomve-flag-softfp.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c: New test.
|
||||
* gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: New test.
|
||||
* gcc.target/arm/multilib.exp: Add tests for -mcpu=cortex-m55.
|
||||
|
||||
2020-10-05 Dennis Zhang <dennis.zhang@arm.com>
|
||||
|
||||
* gcc.target/arm/mve/intrinsics/vreinterpretq_f16.c: Use additional
|
||||
|
||||
@ -1,3 +1,12 @@
|
||||
2020-10-06 Tom de Vries <tdevries@suse.de>
|
||||
|
||||
* testsuite/libgomp.oacc-fortran/declare-5.f90: Add xfail for PR92790.
|
||||
|
||||
2020-10-06 Tom de Vries <tdevries@suse.de>
|
||||
|
||||
PR middle-end/90861
|
||||
* testsuite/libgomp.oacc-c-c++-common/declare-vla.c: Remove xfail.
|
||||
|
||||
2020-10-05 Tom de Vries <tdevries@suse.de>
|
||||
|
||||
PR fortran/95654
|
||||
|
||||
@ -1,3 +1,9 @@
|
||||
2020-10-06 Martin Liska <mliska@suse.cz>
|
||||
|
||||
PR lto/97290
|
||||
* simple-object-elf.c (simple_object_elf_copy_lto_debug_sections):
|
||||
Use sh_link of a .symtab_shndx section.
|
||||
|
||||
2020-09-24 Mark Wielaard <mark@klomp.org>
|
||||
|
||||
* dwarfnames.c (get_DW_UT_name): Define using DW_UT_FIRST, DW_UT
|
||||
|
||||
@ -1,3 +1,42 @@
|
||||
2020-10-06 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
PR libstdc++/90295
|
||||
* config/abi/pre/gnu.ver (CXXABI_1.3.13): New symbol version.
|
||||
(exception_ptr::_M_addref(), exception_ptr::_M_release()):
|
||||
Export symbols.
|
||||
* libsupc++/eh_ptr.cc (exception_ptr::exception_ptr()):
|
||||
Remove out-of-line definition.
|
||||
(exception_ptr::exception_ptr(const exception_ptr&)):
|
||||
Likewise.
|
||||
(exception_ptr::~exception_ptr()): Likewise.
|
||||
(exception_ptr::operator=(const exception_ptr&)):
|
||||
Likewise.
|
||||
(exception_ptr::swap(exception_ptr&)): Likewise.
|
||||
(exception_ptr::_M_addref()): Add branch prediction.
|
||||
* libsupc++/exception_ptr.h (exception_ptr::operator bool):
|
||||
Add noexcept.
|
||||
[!_GLIBCXX_EH_PTR_COMPAT] (operator==, operator!=): Define
|
||||
inline as hidden friends. Remove declarations at namespace
|
||||
scope.
|
||||
(exception_ptr::exception_ptr()): Define inline.
|
||||
(exception_ptr::exception_ptr(const exception_ptr&)):
|
||||
Likewise.
|
||||
(exception_ptr::~exception_ptr()): Likewise.
|
||||
(exception_ptr::operator=(const exception_ptr&)):
|
||||
Likewise.
|
||||
(exception_ptr::swap(exception_ptr&)): Likewise.
|
||||
* testsuite/util/testsuite_abi.cc: Add CXXABI_1.3.13.
|
||||
* testsuite/18_support/exception_ptr/90295.cc: New test.
|
||||
|
||||
2020-10-06 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
* include/std/ranges (join_view): Remove deduction guide.
|
||||
(views::join): Add explicit template argument list to prevent
|
||||
deducing the wrong type.
|
||||
* testsuite/std/ranges/adaptors/join.cc: Move test for LWG 3474
|
||||
here, from ...
|
||||
* testsuite/std/ranges/adaptors/join_lwg3474.cc: Removed.
|
||||
|
||||
2020-10-05 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
* include/bits/regex.h: Use __int_traits<int> instead of
|
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