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i386.md (fxam<mode>2_i387_with_temp): Remove.

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* config/i386/i386.md (fxam<mode>2_i387_with_temp): Remove.
	(isinfxf2): Ditto.
	(isinf<mode>2): Ditto.

From-SVN: r264795
This commit is contained in:
Uros Bizjak 2018-10-02 17:27:07 +02:00 committed by Uros Bizjak
parent 34c77d0b2f
commit 8dc5696fcd
2 changed files with 6 additions and 75 deletions
gcc
ChangeLog
config/i386
i386.md

6
gcc/ChangeLog

@ -1,3 +1,9 @@
2018-10-02 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (fxam<mode>2_i387_with_temp): Remove.
(isinfxf2): Ditto.
(isinf<mode>2): Ditto.
2018-10-02 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_emit_i387_round): Extend op1 to XFmode

75
gcc/config/i386/i386.md

@ -16456,81 +16456,6 @@
(set_attr "unit" "i387")
(set_attr "mode" "<MODE>")])
(define_insn_and_split "fxam<mode>2_i387_with_temp"
[(set (match_operand:HI 0 "register_operand")
(unspec:HI
[(match_operand:MODEF 1 "memory_operand")]
UNSPEC_FXAM_MEM))]
"TARGET_USE_FANCY_MATH_387
&& can_create_pseudo_p ()"
"#"
"&& 1"
[(set (match_dup 2)(match_dup 1))
(set (match_dup 0)
(unspec:HI [(match_dup 2)] UNSPEC_FXAM))]
{
operands[2] = gen_reg_rtx (<MODE>mode);
MEM_VOLATILE_P (operands[1]) = 1;
}
[(set_attr "type" "multi")
(set_attr "unit" "i387")
(set_attr "mode" "<MODE>")])
(define_expand "isinfxf2"
[(use (match_operand:SI 0 "register_operand"))
(use (match_operand:XF 1 "register_operand"))]
"TARGET_USE_FANCY_MATH_387
&& ix86_libc_has_function (function_c99_misc)"
{
rtx mask = GEN_INT (0x45);
rtx val = GEN_INT (0x05);
rtx scratch = gen_reg_rtx (HImode);
rtx res = gen_reg_rtx (QImode);
emit_insn (gen_fxamxf2_i387 (scratch, operands[1]));
emit_insn (gen_andqi_ext_1 (scratch, scratch, mask));
emit_insn (gen_cmpqi_ext_3 (scratch, val));
ix86_expand_setcc (res, EQ,
gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
emit_insn (gen_zero_extendqisi2 (operands[0], res));
DONE;
})
(define_expand "isinf<mode>2"
[(use (match_operand:SI 0 "register_operand"))
(use (match_operand:MODEF 1 "nonimmediate_operand"))]
"TARGET_USE_FANCY_MATH_387
&& ix86_libc_has_function (function_c99_misc)
&& !(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
{
rtx mask = GEN_INT (0x45);
rtx val = GEN_INT (0x05);
rtx scratch = gen_reg_rtx (HImode);
rtx res = gen_reg_rtx (QImode);
/* Remove excess precision by forcing value through memory. */
if (memory_operand (operands[1], VOIDmode))
emit_insn (gen_fxam<mode>2_i387_with_temp (scratch, operands[1]));
else
{
rtx temp = assign_386_stack_local (<MODE>mode, SLOT_TEMP);
emit_move_insn (temp, operands[1]);
emit_insn (gen_fxam<mode>2_i387_with_temp (scratch, temp));
}
emit_insn (gen_andqi_ext_1 (scratch, scratch, mask));
emit_insn (gen_cmpqi_ext_3 (scratch, val));
ix86_expand_setcc (res, EQ,
gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
emit_insn (gen_zero_extendqisi2 (operands[0], res));
DONE;
})
(define_expand "signbittf2"
[(use (match_operand:SI 0 "register_operand"))
(use (match_operand:TF 1 "register_operand"))]