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c4x.c (c4x_emit_move_sequence): Use loadqi_big_constant and loadhi_big_constant if applicable.
* config/c4x/c4x.c (c4x_emit_move_sequence): Use loadqi_big_constant and loadhi_big_constant if applicable. * config/c4x/c4x.md (loadqi_big_constant, loadhi_big_constant): Tweak and add new splitter.s From-SVN: r35339
This commit is contained in:
Michael Hayes
Michael Hayes
parent
b864825e85
commit
8d485e2d2f
@ -1,3 +1,10 @@
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2000-07-30 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
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* config/c4x/c4x.c (c4x_emit_move_sequence): Use loadqi_big_constant
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and loadhi_big_constant if applicable.
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* config/c4x/c4x.md (loadqi_big_constant, loadhi_big_constant): Tweak
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and add new splitter.s
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2000-07-30 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
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* config/c4x/c4x.c (c4x_rptb_insert): Make more robust.
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@ -60,7 +60,7 @@ rtx floatunshihf2_libfunc;
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static int c4x_leaf_function;
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static char *float_reg_names[] = FLOAT_REGISTER_NAMES;
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static const char *float_reg_names[] = FLOAT_REGISTER_NAMES;
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/* Array of the smallest class containing reg number REGNO, indexed by
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REGNO. Used by REGNO_REG_CLASS in c4x.h. We assume that all these
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@ -161,6 +161,27 @@ static tree pure_tree = NULL_TREE;
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static tree noreturn_tree = NULL_TREE;
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static tree interrupt_tree = NULL_TREE;
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/* Forward declarations */
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static void c4x_add_gc_roots PARAMS ((void));
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static int c4x_isr_reg_used_p PARAMS ((unsigned int));
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static int c4x_leaf_function_p PARAMS ((void));
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static int c4x_assembler_function_p PARAMS ((void));
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static int c4x_immed_float_p PARAMS ((rtx));
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static int c4x_a_register PARAMS ((rtx));
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static int c4x_x_register PARAMS ((rtx));
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static int c4x_immed_int_constant PARAMS ((rtx));
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static int c4x_immed_float_constant PARAMS ((rtx));
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static int c4x_K_constant PARAMS ((rtx));
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static int c4x_N_constant PARAMS ((rtx));
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static int c4x_O_constant PARAMS ((rtx));
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static int c4x_R_indirect PARAMS ((rtx));
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static int c4x_S_indirect PARAMS ((rtx));
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static void c4x_S_address_parse PARAMS ((rtx , int *, int *, int *, int *));
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static int c4x_valid_operands PARAMS ((enum rtx_code, rtx *,
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enum machine_mode, int));
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static int c4x_arn_reg_operand PARAMS ((rtx, enum machine_mode, unsigned int));
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static int c4x_arn_mem_operand PARAMS ((rtx, enum machine_mode, unsigned int));
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static void c4x_check_attribute PARAMS ((const char *, tree, tree, tree *));
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/* Called to register all of our global variables with the garbage
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collector. */
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@ -374,7 +395,7 @@ c4x_output_ascii (stream, ptr, len)
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int
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c4x_hard_regno_mode_ok (regno, mode)
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int regno;
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unsigned int regno;
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enum machine_mode mode;
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{
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switch (mode)
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@ -688,7 +709,7 @@ c4x_va_arg (valist, type)
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static int
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c4x_isr_reg_used_p (regno)
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int regno;
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unsigned int regno;
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{
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/* Don't save/restore FP or ST, we handle them separately. */
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if (regno == FRAME_POINTER_REGNUM
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@ -752,7 +773,7 @@ c4x_assembler_function_p ()
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}
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static int
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int
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c4x_interrupt_function_p ()
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{
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if (lookup_attribute ("interrupt",
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@ -769,55 +790,75 @@ c4x_interrupt_function_p ()
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&& ISDIGIT (current_function_name[6]);
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}
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/* Write function prologue. */
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void
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c4x_function_prologue (file, size)
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FILE *file;
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int size;
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c4x_expand_prologue ()
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{
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int regno;
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unsigned int regno;
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int size = get_frame_size ();
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rtx insn;
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/* In functions where ar3 is not used but frame pointers are still
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specified, frame pointers are not adjusted (if >= -O2) and this is
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used so it won't be needlessly push the frame pointer. */
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/* In functions where ar3 is not used but frame pointers are still
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specified, frame pointers are not adjusted (if >= -O2) and this
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is used so it won't needlessly push the frame pointer. */
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int dont_push_ar3;
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/* For __assembler__ function don't build a prologue. */
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if (c4x_assembler_function_p ())
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{
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fprintf (file, "; *** Assembler Function ***\n");
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return;
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}
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#ifdef FUNCTION_BLOCK_PROFILER_EXIT
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if (profile_block_flag == 2)
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{
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FUNCTION_BLOCK_PROFILER_EXIT
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}
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#endif
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/* For __interrupt__ function build specific prologue. */
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if (c4x_interrupt_function_p ())
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{
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c4x_leaf_function = c4x_leaf_function_p ();
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fprintf (file, "; *** Interrupt Entry %s ***\n",
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c4x_leaf_function ? "(leaf)" : "");
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fprintf (file, "\tpush\tst\n");
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insn = emit_insn (gen_push_st ());
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RTX_FRAME_RELATED_P (insn) = 1;
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if (size)
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{
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fprintf (file, "\tpush\tar3\n\tldi\tsp,ar3\n");
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insn = emit_insn (gen_pushqi ( gen_rtx_REG (QImode, AR3_REGNO)));
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RTX_FRAME_RELATED_P (insn) = 1;
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insn = emit_insn (gen_movqi (gen_rtx_REG (QImode, AR3_REGNO),
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gen_rtx_REG (QImode, SP_REGNO)));
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RTX_FRAME_RELATED_P (insn) = 1;
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/* FIXME: Assume ISR doesn't require more than 32767 words
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of local variables. */
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if (size > 32767)
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error ("ISR %s requires %d words of local variables, "
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"maximum is 32767.", current_function_name, size);
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fprintf (file, "\taddi\t%d,sp\n", size);
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insn = emit_insn (gen_addqi3 (gen_rtx_REG (QImode, SP_REGNO),
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gen_rtx_REG (QImode, SP_REGNO),
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GEN_INT(size)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
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{
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if (c4x_isr_reg_used_p (regno))
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{
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fprintf (file, "\tpush\t%s\n", reg_names[regno]);
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if (IS_EXT_REGNO (regno)) /* Save 32MSB of R0--R11. */
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fprintf (file, "\tpushf\t%s\n",
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TARGET_TI ? reg_names[regno]
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: float_reg_names[regno]);
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if (regno == DP_REGNO)
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{
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insn = emit_insn (gen_push_dp ());
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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else
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{
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insn = emit_insn (gen_pushqi (gen_rtx_REG (QImode, regno)));
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RTX_FRAME_RELATED_P (insn) = 1;
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if (IS_EXT_REGNO (regno))
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{
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insn = emit_insn (gen_pushqf
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(gen_rtx_REG (QFmode, regno)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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}
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}
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}
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/* We need to clear the repeat mode flag if the ISR is
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@ -826,14 +867,20 @@ c4x_function_prologue (file, size)
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if (regs_ever_live[RC_REGNO]
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|| regs_ever_live[RS_REGNO]
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|| regs_ever_live[RE_REGNO])
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fprintf (file, "\tandn\t0100h,st\n");
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{
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insn = emit_insn (gen_andn_st (GEN_INT(~0x100)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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/* Reload DP reg if we are paranoid about some turkey
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violating small memory model rules. */
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if (TARGET_SMALL && TARGET_PARANOID)
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fprintf (file, TARGET_C3X ?
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"\tldp\t@data_sec\n" :
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"\tldpk\t@data_sec\n");
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{
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insn = emit_insn (gen_set_ldp_prologue
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(gen_rtx_REG (QImode, DP_REGNO),
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gen_rtx_SYMBOL_REF (QImode, "data_sec")));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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}
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else
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{
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@ -843,8 +890,11 @@ c4x_function_prologue (file, size)
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|| (current_function_args_size != 0)
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|| (optimize < 2))
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{
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fprintf (file, "\tpush\tar3\n");
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fprintf (file, "\tldi\tsp,ar3\n");
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insn = emit_insn (gen_pushqi ( gen_rtx_REG (QImode, AR3_REGNO)));
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RTX_FRAME_RELATED_P (insn) = 1;
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insn = emit_insn (gen_movqi (gen_rtx_REG (QImode, AR3_REGNO),
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gen_rtx_REG (QImode, SP_REGNO)));
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RTX_FRAME_RELATED_P (insn) = 1;
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dont_push_ar3 = 1;
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}
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else
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@ -865,28 +915,46 @@ c4x_function_prologue (file, size)
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size += 1;
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}
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}
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if (size > 32767)
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{
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/* Local vars are too big, it will take multiple operations
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to increment SP. */
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if (TARGET_C3X)
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{
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fprintf (file, "\tldi\t%d,r1\n", size >> 16);
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fprintf (file, "\tlsh\t16,r1\n");
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insn = emit_insn (gen_movqi (gen_rtx_REG (QImode, R1_REGNO),
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GEN_INT(size >> 16)));
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RTX_FRAME_RELATED_P (insn) = 1;
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insn = emit_insn (gen_lshrqi3 (gen_rtx_REG (QImode, R1_REGNO),
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gen_rtx_REG (QImode, R1_REGNO),
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GEN_INT(-16)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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else
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fprintf (file, "\tldhi\t%d,r1\n", size >> 16);
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fprintf (file, "\tor\t%d,r1\n", size & 0xffff);
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fprintf (file, "\taddi\tr1,sp\n");
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{
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insn = emit_insn (gen_movqi (gen_rtx_REG (QImode, R1_REGNO),
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GEN_INT(size & ~0xffff)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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insn = emit_insn (gen_iorqi3 (gen_rtx_REG (QImode, R1_REGNO),
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gen_rtx_REG (QImode, R1_REGNO),
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GEN_INT(size & 0xffff)));
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RTX_FRAME_RELATED_P (insn) = 1;
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insn = emit_insn (gen_addqi3 (gen_rtx_REG (QImode, SP_REGNO),
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gen_rtx_REG (QImode, SP_REGNO),
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gen_rtx_REG (QImode, R1_REGNO)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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else if (size != 0)
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{
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/* Local vars take up less than 32767 words, so we can directly
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add the number. */
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fprintf (file, "\taddi\t%d,sp\n", size);
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insn = emit_insn (gen_addqi3 (gen_rtx_REG (QImode, SP_REGNO),
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gen_rtx_REG (QImode, SP_REGNO),
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GEN_INT (size)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
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{
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if (regs_ever_live[regno] && ! call_used_regs[regno])
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@ -895,14 +963,18 @@ c4x_function_prologue (file, size)
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{
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/* R6 and R7 are saved as floating point. */
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if (TARGET_PRESERVE_FLOAT)
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fprintf (file, "\tpush\t%s\n", reg_names[regno]);
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fprintf (file, "\tpushf\t%s\n",
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TARGET_TI ? reg_names[regno]
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: float_reg_names[regno]);
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{
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insn = emit_insn (gen_pushqi
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(gen_rtx_REG (QImode, regno)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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insn = emit_insn (gen_pushqf (gen_rtx_REG (QFmode, regno)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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else if ((! dont_push_ar3) || (regno != AR3_REGNO))
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{
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fprintf (file, "\tpush\t%s\n", reg_names[regno]);
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insn = emit_insn (gen_pushqi ( gen_rtx_REG (QImode, regno)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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}
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}
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@ -910,40 +982,23 @@ c4x_function_prologue (file, size)
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}
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/* Write function epilogue. */
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void
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c4x_function_epilogue (file, size)
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FILE *file;
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int size;
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c4x_expand_epilogue()
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{
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int regno;
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int restore_count = 0;
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int delayed_jump = 0;
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int jump = 0;
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int dont_pop_ar3;
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rtx insn;
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insn = get_last_insn ();
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if (insn && GET_CODE (insn) == NOTE)
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insn = prev_nonnote_insn (insn);
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if (insn && GET_CODE (insn) == BARRIER)
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return;
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int size = get_frame_size ();
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/* For __assembler__ function build no epilogue. */
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if (c4x_assembler_function_p ())
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{
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fprintf (file, "\trets\n"); /* Play it safe. */
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insn = emit_jump_insn (gen_return_from_epilogue ());
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RTX_FRAME_RELATED_P (insn) = 1;
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return;
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}
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#ifdef FUNCTION_BLOCK_PROFILER_EXIT
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if (profile_block_flag == 2)
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{
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FUNCTION_BLOCK_PROFILER_EXIT (file);
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}
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#endif
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/* For __interrupt__ function build specific epilogue. */
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if (c4x_interrupt_function_p ())
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{
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@ -951,19 +1006,39 @@ c4x_function_epilogue (file, size)
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{
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if (! c4x_isr_reg_used_p (regno))
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continue;
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if (IS_EXT_REGNO (regno))
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fprintf (file, "\tpopf\t%s\n",
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TARGET_TI ? reg_names[regno]
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: float_reg_names[regno]);
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fprintf (file, "\tpop\t%s\n", reg_names[regno]);
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if (regno == DP_REGNO)
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{
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insn = emit_insn (gen_pop_dp ());
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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else
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{
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/* We have to use unspec because the compiler will delete insns
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that are not call-saved. */
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if (IS_EXT_REGNO (regno))
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{
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insn = emit_insn (gen_popqf_unspec
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(gen_rtx_REG (QFmode, regno)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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insn = emit_insn (gen_popqi_unspec (gen_rtx_REG (QImode, regno)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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}
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if (size)
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{
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fprintf (file, "\tsubi\t%d,sp\n", size);
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fprintf (file, "\tpop\tar3\n");
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insn = emit_insn (gen_subqi3 (gen_rtx_REG (QImode, SP_REGNO),
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gen_rtx_REG (QImode, SP_REGNO),
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GEN_INT(size)));
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RTX_FRAME_RELATED_P (insn) = 1;
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insn = emit_insn (gen_popqi
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(gen_rtx_REG (QImode, AR3_REGNO)));
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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fprintf (file, "\tpop\tst\n");
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fprintf (file, "\treti\n");
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insn = emit_insn (gen_pop_st ());
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RTX_FRAME_RELATED_P (insn) = 1;
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insn = emit_jump_insn (gen_return_from_interrupt_epilogue ());
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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else
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{
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@ -973,14 +1048,19 @@ c4x_function_epilogue (file, size)
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|| (current_function_args_size != 0)
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|| (optimize < 2))
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{
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/* R2 holds the return value. */
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fprintf (file, "\tldi\t*-ar3(1),r2\n");
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insn = emit_insn
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(gen_movqi (gen_rtx_REG (QImode, R2_REGNO),
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gen_rtx_MEM (QImode,
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gen_rtx_PLUS
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(QImode, gen_rtx_REG (QImode,
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AR3_REGNO),
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GEN_INT(-1)))));
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RTX_FRAME_RELATED_P (insn) = 1;
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/* We already have the return value and the fp,
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so we need to add those to the stack. */
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size += 2;
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delayed_jump = 1;
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restore_count = 1;
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jump = 1;
|
||||
dont_pop_ar3 = 1;
|
||||
}
|
||||
else
|
||||
@ -1001,41 +1081,7 @@ c4x_function_epilogue (file, size)
|
||||
size += 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Now get the number of instructions required to restore the
|
||||
registers. */
|
||||
for (regno = FIRST_PSEUDO_REGISTER - 1; regno >= 0; regno--)
|
||||
{
|
||||
if ((regs_ever_live[regno] && ! call_used_regs[regno])
|
||||
&& ((! dont_pop_ar3) || (regno != AR3_REGNO)))
|
||||
{
|
||||
restore_count++;
|
||||
if (TARGET_PRESERVE_FLOAT
|
||||
&& ((regno == R6_REGNO) || (regno == R7_REGNO)))
|
||||
restore_count++;
|
||||
}
|
||||
}
|
||||
|
||||
/* Get the number of instructions required to restore the stack. */
|
||||
if (size > 32767)
|
||||
restore_count += (TARGET_C3X ? 4 : 3);
|
||||
else if (size != 0)
|
||||
restore_count += 1;
|
||||
|
||||
if (delayed_jump && (restore_count < 3))
|
||||
{
|
||||
/* We don't have enough instructions to account for the delayed
|
||||
branch, so put some nops in. */
|
||||
|
||||
fprintf (file, "\tbud\tr2\n");
|
||||
while (restore_count < 3)
|
||||
{
|
||||
fprintf (file, "\tnop\n");
|
||||
restore_count++;
|
||||
}
|
||||
restore_count = 0;
|
||||
}
|
||||
|
||||
|
||||
/* Now restore the saved registers, putting in the delayed branch
|
||||
where required. */
|
||||
for (regno = FIRST_PSEUDO_REGISTER - 1; regno >= 0; regno--)
|
||||
@ -1044,33 +1090,28 @@ c4x_function_epilogue (file, size)
|
||||
{
|
||||
if (regno == AR3_REGNO && dont_pop_ar3)
|
||||
continue;
|
||||
|
||||
if (delayed_jump && (restore_count == 3))
|
||||
fprintf (file, "\tbud\tr2\n");
|
||||
|
||||
|
||||
/* R6 and R7 are saved as floating point. */
|
||||
if ((regno == R6_REGNO) || (regno == R7_REGNO))
|
||||
{
|
||||
fprintf (file, "\tpopf\t%s\n",
|
||||
TARGET_TI ? reg_names[regno]
|
||||
: float_reg_names[regno]);
|
||||
insn = emit_insn (gen_popqf_unspec
|
||||
(gen_rtx_REG (QFmode, regno)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
if (TARGET_PRESERVE_FLOAT)
|
||||
{
|
||||
restore_count--;
|
||||
if (delayed_jump && (restore_count == 3))
|
||||
fprintf (file, "\tbud\tr2\n");
|
||||
fprintf (file, "\tpop\t%s\n", reg_names[regno]);
|
||||
insn = emit_insn (gen_popqi_unspec
|
||||
(gen_rtx_REG (QImode, regno)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
}
|
||||
else
|
||||
fprintf (file, "\tpop\t%s\n", reg_names[regno]);
|
||||
restore_count--;
|
||||
{
|
||||
insn = emit_insn (gen_popqi (gen_rtx_REG (QImode, regno)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (delayed_jump && (restore_count == 3))
|
||||
fprintf (file, "\tbud\tr2\n");
|
||||
|
||||
|
||||
if (frame_pointer_needed)
|
||||
{
|
||||
if ((size != 0)
|
||||
@ -1078,42 +1119,69 @@ c4x_function_epilogue (file, size)
|
||||
|| (optimize < 2))
|
||||
{
|
||||
/* Restore the old FP. */
|
||||
fprintf (file, "\tldi\t*ar3,ar3\n");
|
||||
restore_count--;
|
||||
|
||||
if (delayed_jump && (restore_count == 3))
|
||||
fprintf (file, "\tbud\tr2\n");
|
||||
insn = emit_insn
|
||||
(gen_movqi
|
||||
(gen_rtx_REG (QImode, AR3_REGNO),
|
||||
gen_rtx_MEM (QImode, gen_rtx_REG (QImode, AR3_REGNO))));
|
||||
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if (size > 32767)
|
||||
{
|
||||
/* Local vars are too big, it will take multiple operations
|
||||
to decrement SP. */
|
||||
if (TARGET_C3X)
|
||||
{
|
||||
fprintf (file, "\tldi\t%d,r3\n", size >> 16);
|
||||
if (delayed_jump)
|
||||
fprintf (file, "\tbud\tr2\n");
|
||||
fprintf (file, "\tlsh\t16,r3\n");
|
||||
insn = emit_insn (gen_movqi (gen_rtx_REG (QImode, R3_REGNO),
|
||||
GEN_INT(size >> 16)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
insn = emit_insn (gen_lshrqi3 (gen_rtx_REG (QImode, R3_REGNO),
|
||||
gen_rtx_REG (QImode, R3_REGNO),
|
||||
GEN_INT(-16)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
else
|
||||
fprintf (file, "\tldhi\t%d,r3\n", size >> 16);
|
||||
fprintf (file, "\tor\t%d,r3\n", size & 0xffff);
|
||||
fprintf (file, "\tsubi\tr3,sp\n");
|
||||
{
|
||||
insn = emit_insn (gen_movqi (gen_rtx_REG (QImode, R3_REGNO),
|
||||
GEN_INT(size & ~0xffff)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
insn = emit_insn (gen_iorqi3 (gen_rtx_REG (QImode, R3_REGNO),
|
||||
gen_rtx_REG (QImode, R3_REGNO),
|
||||
GEN_INT(size & 0xffff)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
insn = emit_insn (gen_subqi3 (gen_rtx_REG (QImode, SP_REGNO),
|
||||
gen_rtx_REG (QImode, SP_REGNO),
|
||||
gen_rtx_REG (QImode, R3_REGNO)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
else if (size != 0)
|
||||
{
|
||||
/* Local vars take up less than 32768 words, so we can directly
|
||||
subtract the number. */
|
||||
fprintf (file, "\tsubi\t%d,sp\n", size);
|
||||
insn = emit_insn (gen_subqi3 (gen_rtx_REG (QImode, SP_REGNO),
|
||||
gen_rtx_REG (QImode, SP_REGNO),
|
||||
GEN_INT(size)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
|
||||
if (jump)
|
||||
{
|
||||
insn = emit_insn (gen_indirect_jump (
|
||||
gen_rtx_REG (QImode, R2_REGNO)));
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
insn = emit_jump_insn (gen_return_from_epilogue ());
|
||||
RTX_FRAME_RELATED_P (insn) = 1;
|
||||
}
|
||||
|
||||
if (! delayed_jump)
|
||||
fprintf (file, "\trets\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
c4x_null_epilogue_p ()
|
||||
{
|
||||
@ -1137,6 +1205,7 @@ c4x_null_epilogue_p ()
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
c4x_emit_move_sequence (operands, mode)
|
||||
rtx *operands;
|
||||
@ -1259,6 +1328,42 @@ c4x_emit_move_sequence (operands, mode)
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (mode == QImode
|
||||
&& reg_operand (op0, mode)
|
||||
&& const_int_operand (op1, mode)
|
||||
&& ! IS_INT16_CONST (INTVAL (op1))
|
||||
&& ! IS_HIGH_CONST (INTVAL (op1)))
|
||||
{
|
||||
emit_insn (gen_loadqi_big_constant (op0, op1));
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (mode == HImode
|
||||
&& reg_operand (op0, mode)
|
||||
&& const_int_operand (op1, mode))
|
||||
{
|
||||
emit_insn (gen_loadhi_big_constant (op0, op1));
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (mode == QImode
|
||||
&& reg_operand (op0, mode)
|
||||
&& const_int_operand (op1, mode)
|
||||
&& ! IS_INT16_CONST (INTVAL (op1))
|
||||
&& ! IS_HIGH_CONST (INTVAL (op1)))
|
||||
{
|
||||
emit_insn (gen_loadqi_big_constant (op0, op1));
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (mode == HImode
|
||||
&& reg_operand (op0, mode)
|
||||
&& const_int_operand (op1, mode))
|
||||
{
|
||||
emit_insn (gen_loadhi_big_constant (op0, op1));
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Adjust operands in case we have modified them. */
|
||||
operands[0] = op0;
|
||||
operands[1] = op1;
|
||||
@ -1313,7 +1418,7 @@ c4x_emit_libcall3 (libcall, code, mode, operands)
|
||||
enum machine_mode mode;
|
||||
rtx *operands;
|
||||
{
|
||||
return c4x_emit_libcall (libcall, code, mode, mode, 3, operands);
|
||||
c4x_emit_libcall (libcall, code, mode, mode, 3, operands);
|
||||
}
|
||||
|
||||
|
||||
@ -1738,7 +1843,7 @@ c4x_gen_compare_reg (code, x, y)
|
||||
|
||||
char *
|
||||
c4x_output_cbranch (form, seq)
|
||||
char *form;
|
||||
const char *form;
|
||||
rtx seq;
|
||||
{
|
||||
int delayed = 0;
|
||||
@ -3684,7 +3789,7 @@ static int
|
||||
c4x_valid_operands (code, operands, mode, force)
|
||||
enum rtx_code code;
|
||||
rtx *operands;
|
||||
enum machine_mode mode;
|
||||
enum machine_mode mode ATTRIBUTE_UNUSED;
|
||||
int force;
|
||||
{
|
||||
rtx op1;
|
||||
@ -3716,9 +3821,9 @@ c4x_valid_operands (code, operands, mode, force)
|
||||
|
||||
if (code1 == MEM && code2 == MEM)
|
||||
{
|
||||
if (c4x_S_indirect (op1, mode) && c4x_S_indirect (op2, mode))
|
||||
if (c4x_S_indirect (op1) && c4x_S_indirect (op2))
|
||||
return 1;
|
||||
return c4x_R_indirect (op1, mode) && c4x_R_indirect (op2, mode);
|
||||
return c4x_R_indirect (op1) && c4x_R_indirect (op2);
|
||||
}
|
||||
|
||||
if (code1 == code2)
|
||||
@ -3972,7 +4077,7 @@ static int
|
||||
c4x_arn_reg_operand (op, mode, regno)
|
||||
rtx op;
|
||||
enum machine_mode mode;
|
||||
int regno;
|
||||
unsigned int regno;
|
||||
{
|
||||
if (mode != VOIDmode && mode != GET_MODE (op))
|
||||
return 0;
|
||||
@ -3986,7 +4091,7 @@ static int
|
||||
c4x_arn_mem_operand (op, mode, regno)
|
||||
rtx op;
|
||||
enum machine_mode mode;
|
||||
int regno;
|
||||
unsigned int regno;
|
||||
{
|
||||
if (mode != VOIDmode && mode != GET_MODE (op))
|
||||
return 0;
|
||||
@ -4523,7 +4628,7 @@ c4x_file_end (fp)
|
||||
|
||||
static void
|
||||
c4x_check_attribute (attrib, list, decl, attributes)
|
||||
char *attrib;
|
||||
const char *attrib;
|
||||
tree list, decl, *attributes;
|
||||
{
|
||||
while (list != NULL_TREE
|
||||
|
||||
@ -1131,6 +1131,23 @@
|
||||
(set (match_dup 0) (lo_sum:QI (match_dup 0) (match_dup 1)))]
|
||||
"")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))
|
||||
(clobber (reg:QI 16))]
|
||||
"! TARGET_C3X
|
||||
&& ! IS_INT16_CONST (INTVAL (operands[1]))
|
||||
&& ! IS_HIGH_CONST (INTVAL (operands[1]))
|
||||
&& reload_completed
|
||||
&& std_reg_operand (operands[0], QImode)"
|
||||
[(set (match_dup 0) (match_dup 2))
|
||||
(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 3)))]
|
||||
"
|
||||
{
|
||||
operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & ~0xffff);
|
||||
operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 0xffff);
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))]
|
||||
@ -1147,6 +1164,28 @@
|
||||
operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 0xffff);
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))
|
||||
(clobber (reg:QI 16))]
|
||||
"TARGET_C3X && ! TARGET_SMALL
|
||||
&& ! IS_INT16_CONST (INTVAL (operands[1]))
|
||||
&& reload_completed
|
||||
&& std_reg_operand (operands[0], QImode)
|
||||
&& c4x_shiftable_constant (operands[1]) < 0"
|
||||
[(set (match_dup 0) (match_dup 2))
|
||||
(set (match_dup 0) (ashift:QI (match_dup 0) (match_dup 4)))
|
||||
(set (match_dup 0) (ior:QI (match_dup 0) (match_dup 3)))]
|
||||
"
|
||||
{
|
||||
/* Generate two's complement value of 16 MSBs. */
|
||||
operands[2] = gen_rtx (CONST_INT, VOIDmode,
|
||||
(((INTVAL (operands[1]) >> 16) & 0xffff)
|
||||
- 0x8000) ^ ~0x7fff);
|
||||
operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 0xffff);
|
||||
operands[4] = gen_rtx (CONST_INT, VOIDmode, 16);
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))]
|
||||
@ -1168,6 +1207,28 @@
|
||||
operands[4] = gen_rtx (CONST_INT, VOIDmode, 16);
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))
|
||||
(clobber (reg:QI 16))]
|
||||
"TARGET_C3X
|
||||
&& ! IS_INT16_CONST (INTVAL (operands[1]))
|
||||
&& reload_completed
|
||||
&& std_reg_operand (operands[0], QImode)
|
||||
&& c4x_shiftable_constant (operands[1]) >= 0"
|
||||
[(set (match_dup 0) (match_dup 2))
|
||||
(set (match_dup 0) (ashift:QI (match_dup 0) (match_dup 3)))]
|
||||
"
|
||||
{
|
||||
/* Generate two's complement value of MSBs. */
|
||||
int shift = c4x_shiftable_constant (operands[1]);
|
||||
|
||||
operands[2] = gen_rtx (CONST_INT, VOIDmode,
|
||||
(((INTVAL (operands[1]) >> shift) & 0xffff)
|
||||
- 0x8000) ^ ~0x7fff);
|
||||
operands[3] = gen_rtx (CONST_INT, VOIDmode, shift);
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))]
|
||||
@ -1189,6 +1250,29 @@
|
||||
operands[3] = gen_rtx (CONST_INT, VOIDmode, shift);
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))
|
||||
(clobber (reg:QI 16))]
|
||||
"! TARGET_SMALL
|
||||
&& ! IS_INT16_CONST (INTVAL (operands[1]))
|
||||
&& ! IS_HIGH_CONST (INTVAL (operands[1]))
|
||||
&& reload_completed
|
||||
&& ! std_reg_operand (operands[0], QImode)"
|
||||
[(set (match_dup 2) (high:QI (match_dup 3)))
|
||||
(set (match_dup 0) (match_dup 4))
|
||||
(use (match_dup 1))]
|
||||
"
|
||||
{
|
||||
rtx dp_reg = gen_rtx_REG (Pmode, DP_REGNO);
|
||||
operands[2] = dp_reg;
|
||||
operands[3] = force_const_mem (Pmode, operands[1]);
|
||||
operands[4] = change_address (operands[3], QImode,
|
||||
gen_rtx_LO_SUM (Pmode, dp_reg,
|
||||
XEXP (operands[3], 0)));
|
||||
operands[3] = XEXP (operands[3], 0);
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))]
|
||||
@ -1211,6 +1295,27 @@
|
||||
operands[3] = XEXP (operands[3], 0);
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))
|
||||
(clobber (reg:QI 16))]
|
||||
"TARGET_SMALL
|
||||
&& ! IS_INT16_CONST (INTVAL (operands[1]))
|
||||
&& ! IS_HIGH_CONST (INTVAL (operands[1]))
|
||||
&& reload_completed
|
||||
&& ((TARGET_C3X && c4x_shiftable_constant (operands[1]) < 0)
|
||||
|| ! std_reg_operand (operands[0], QImode))"
|
||||
[(set (match_dup 0) (match_dup 2))
|
||||
(use (match_dup 1))]
|
||||
"
|
||||
{
|
||||
rtx dp_reg = gen_rtx_REG (Pmode, DP_REGNO);
|
||||
operands[2] = force_const_mem (Pmode, operands[1]);
|
||||
operands[2] = change_address (operands[2], QImode,
|
||||
gen_rtx_LO_SUM (Pmode, dp_reg,
|
||||
XEXP (operands[2], 0)));
|
||||
}")
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:QI 0 "reg_operand" "")
|
||||
(match_operand:QI 1 "const_int_operand" ""))]
|
||||
@ -1233,7 +1338,8 @@
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:HI 0 "reg_operand" "")
|
||||
(match_operand:HI 1 "const_int_operand" ""))]
|
||||
(match_operand:HI 1 "const_int_operand" ""))
|
||||
(clobber (reg:QI 16))]
|
||||
"reload_completed"
|
||||
[(set (match_dup 2) (match_dup 4))
|
||||
(set (match_dup 3) (match_dup 5))]
|
||||
@ -1315,7 +1421,8 @@
|
||||
|
||||
(define_insn "loadhi_big_constant"
|
||||
[(set (match_operand:HI 0 "reg_operand" "=c*d")
|
||||
(match_operand:HI 1 "const_int_operand" ""))]
|
||||
(match_operand:HI 1 "const_int_operand" ""))
|
||||
(clobber (reg:QI 16))]
|
||||
""
|
||||
"#"
|
||||
[(set_attr "type" "multi")])
|
||||
@ -1336,7 +1443,8 @@
|
||||
|
||||
(define_insn "loadqi_big_constant"
|
||||
[(set (match_operand:QI 0 "reg_operand" "=c*d")
|
||||
(match_operand:QI 1 "const_int_operand" ""))]
|
||||
(match_operand:QI 1 "const_int_operand" ""))
|
||||
(clobber (reg:QI 16))]
|
||||
"! IS_INT16_CONST (INTVAL (operands[1]))
|
||||
&& ! IS_HIGH_CONST (INTVAL (operands[1]))"
|
||||
"#"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user