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re PR rtl-optimization/82628 (wrong code at -Os on x86_64-linux-gnu in the 32-bit mode)
PR target/82628 * config/i386/i386.md (cmp<dwi>_doubleword): New pattern. * config/i386/i386.c (ix86_expand_branch) <case E_TImode>: Expand with cmp<dwi>_doubleword. testsuite/ChangeLog: PR target/82628 * gcc.dg/torture/pr82628.c: New test. Co-Authored-By: Jakub Jelinek <jakub@redhat.com> From-SVN: r253985
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@ -22357,33 +22357,25 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label)
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switch (code)
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{
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case LE: case LEU: case GT: case GTU:
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std::swap (lo[0], lo[1]);
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std::swap (hi[0], hi[1]);
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std::swap (op0, op1);
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code = swap_condition (code);
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/* FALLTHRU */
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case LT: case LTU: case GE: case GEU:
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{
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rtx (*cmp_insn) (rtx, rtx);
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rtx (*sbb_insn) (rtx, rtx, rtx);
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rtx (*cmp_insn) (rtx, rtx, rtx);
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if (TARGET_64BIT)
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cmp_insn = gen_cmpdi_1, sbb_insn = gen_subdi3_carry_ccgz;
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cmp_insn = gen_cmpti_doubleword;
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else
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cmp_insn = gen_cmpsi_1, sbb_insn = gen_subsi3_carry_ccgz;
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cmp_insn = gen_cmpdi_doubleword;
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if (!nonimmediate_operand (lo[0], submode))
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lo[0] = force_reg (submode, lo[0]);
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if (!x86_64_general_operand (lo[1], submode))
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lo[1] = force_reg (submode, lo[1]);
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if (!register_operand (op0, mode))
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op0 = force_reg (mode, op0);
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if (!x86_64_hilo_general_operand (op1, mode))
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op1 = force_reg (mode, op1);
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if (!register_operand (hi[0], submode))
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hi[0] = force_reg (submode, hi[0]);
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if (!x86_64_general_operand (hi[1], submode))
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hi[1] = force_reg (submode, hi[1]);
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emit_insn (cmp_insn (lo[0], lo[1]));
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emit_insn (sbb_insn (gen_rtx_SCRATCH (submode), hi[0], hi[1]));
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emit_insn (cmp_insn (gen_rtx_SCRATCH (mode), op0, op1));
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tmp = gen_rtx_REG (CCGZmode, FLAGS_REG);
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@ -1273,6 +1273,26 @@
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(compare:CC (match_operand:SWI48 0 "nonimmediate_operand")
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(match_operand:SWI48 1 "<general_operand>")))])
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(define_insn_and_split "cmp<dwi>_doubleword"
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[(set (reg:CCGZ FLAGS_REG)
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(compare:CCGZ
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(match_operand:<DWI> 1 "register_operand" "0")
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(match_operand:<DWI> 2 "x86_64_hilo_general_operand" "ro<di>")))
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(clobber (match_scratch:<DWI> 0 "=r"))]
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""
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"#"
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"reload_completed"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 1) (match_dup 2)))
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(parallel [(set (reg:CCGZ FLAGS_REG)
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(compare: CCGZ
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(match_dup 4)
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(plus:DWIH
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(ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
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(match_dup 5))))
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(clobber (match_dup 3))])]
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"split_double_mode (<DWI>mode, &operands[0], 3, &operands[0], &operands[3]);")
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(define_insn "*cmp<mode>_ccno_1"
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[(set (reg FLAGS_REG)
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(compare (match_operand:SWI 0 "nonimmediate_operand" "<r>,?m<r>")
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@ -6891,7 +6911,7 @@
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(set_attr "pent_pair" "pu")
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(set_attr "mode" "SI")])
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(define_insn "sub<mode>3_carry_ccgz"
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(define_insn "*sub<mode>3_carry_ccgz"
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[(set (reg:CCGZ FLAGS_REG)
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(compare:CCGZ
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(match_operand:DWIH 1 "register_operand" "0")
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@ -1,3 +1,9 @@
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2017-10-22 Uros Bizjak <ubizjak@gmail.com>
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Jakub Jelinek <jakub@redhat.com>
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PR target/82628
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* gcc.dg/torture/pr82628.c: New test.
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2017-10-22 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* c-c++-common/attr-nocf-check-1a.c: Remove test.
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34
gcc/testsuite/gcc.target/i386/pr82628.c
Normal file
34
gcc/testsuite/gcc.target/i386/pr82628.c
Normal file
@ -0,0 +1,34 @@
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/* { dg-do run { target ia32 } } */
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/* { dg-options "-Os" } */
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void
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__attribute__ ((noipa))
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foo (const char *x)
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{
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asm volatile ("" : "+g" (x) : : "memory");
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if (x)
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__builtin_abort ();
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}
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int a, b = 1;
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int
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main ()
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{
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while (1)
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{
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unsigned long long d = 18446744073709551615UL;
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while (1)
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{
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int e = b;
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while (d < 2)
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foo ("0");
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if (a)
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d++;
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if (b)
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break;
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}
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break;
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}
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return 0;
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}
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