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emit-rtl.c (need_atomic_barrier_p): New function.
* emit-rtl.c (need_atomic_barrier_p): New function. * emit-rtl.h (need_atomic_barrier_p): Declare it. * config/alpha/alpha.c (alpha_{pre,post}_atomic_barrier): Use it. * config/arm/arm.c (arm_{pre,post}_atomic_barrier): Use it. * config/tilegx/tilegx.c (tile_{pre,post}_atomic_barrier): Use it. * config/mips/mips.c (mips_{pre,post}_atomic_barrier_p): Remove. (mips_process_sync_loop): Use generic version instead. From-SVN: r188806
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@ -1,3 +1,13 @@
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2012-06-19 Maxim Kuvyrkov <maxim@codesourcery.com>
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* emit-rtl.c (need_atomic_barrier_p): New function.
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* emit-rtl.h (need_atomic_barrier_p): Declare it.
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* config/alpha/alpha.c (alpha_{pre,post}_atomic_barrier): Use it.
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* config/arm/arm.c (arm_{pre,post}_atomic_barrier): Use it.
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* config/tilegx/tilegx.c (tile_{pre,post}_atomic_barrier): Use it.
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* config/mips/mips.c (mips_{pre,post}_atomic_barrier_p): Remove.
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(mips_process_sync_loop): Use generic version instead.
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2012-06-19 Maxim Kuvyrkov <maxim@codesourcery.com>
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* config/mips/mips.c (mips_process_sync_loop): Emit cmp result only if
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@ -4262,39 +4262,15 @@ emit_store_conditional (enum machine_mode mode, rtx res, rtx mem, rtx val)
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static void
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alpha_pre_atomic_barrier (enum memmodel model)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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case MEMMODEL_ACQUIRE:
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break;
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case MEMMODEL_RELEASE:
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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emit_insn (gen_memory_barrier ());
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break;
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default:
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gcc_unreachable ();
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}
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if (need_atomic_barrier_p (model, true))
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emit_insn (gen_memory_barrier ());
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}
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static void
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alpha_post_atomic_barrier (enum memmodel model)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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case MEMMODEL_RELEASE:
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break;
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case MEMMODEL_ACQUIRE:
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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emit_insn (gen_memory_barrier ());
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break;
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default:
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gcc_unreachable ();
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}
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if (need_atomic_barrier_p (model, false))
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emit_insn (gen_memory_barrier ());
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}
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/* A subroutine of the atomic operation splitters. Emit an insxl
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@ -25572,39 +25572,15 @@ vfp3_const_double_for_fract_bits (rtx operand)
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static void
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arm_pre_atomic_barrier (enum memmodel model)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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case MEMMODEL_ACQUIRE:
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break;
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case MEMMODEL_RELEASE:
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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emit_insn (gen_memory_barrier ());
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break;
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default:
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gcc_unreachable ();
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}
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if (need_atomic_barrier_p (model, true))
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emit_insn (gen_memory_barrier ());
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}
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static void
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arm_post_atomic_barrier (enum memmodel model)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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case MEMMODEL_RELEASE:
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break;
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case MEMMODEL_ACQUIRE:
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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emit_insn (gen_memory_barrier ());
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break;
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default:
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gcc_unreachable ();
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}
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if (need_atomic_barrier_p (model, false))
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emit_insn (gen_memory_barrier ());
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}
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/* Emit the load-exclusive and store-exclusive instructions. */
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@ -11982,45 +11982,6 @@ mips_sync_insn2_template (enum attr_sync_insn2 type)
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gcc_unreachable ();
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}
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/* Subroutines of the mips_process_sync_loop.
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Emit barriers as needed for the memory MODEL. */
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static bool
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mips_emit_pre_atomic_barrier_p (enum memmodel model)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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case MEMMODEL_ACQUIRE:
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return false;
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case MEMMODEL_RELEASE:
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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return true;
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default:
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gcc_unreachable ();
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}
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}
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static bool
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mips_emit_post_atomic_barrier_p (enum memmodel model)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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case MEMMODEL_RELEASE:
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return false;
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case MEMMODEL_ACQUIRE:
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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return true;
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default:
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gcc_unreachable ();
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}
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}
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/* OPERANDS are the operands to a sync loop instruction and INDEX is
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the value of the one of the sync_* attributes. Return the operand
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referred to by the attribute, or DEFAULT_VALUE if the insn doesn't
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@ -12093,7 +12054,7 @@ mips_process_sync_loop (rtx insn, rtx *operands)
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mips_multi_start ();
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/* Output the release side of the memory barrier. */
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if (mips_emit_pre_atomic_barrier_p (model))
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if (need_atomic_barrier_p (model, true))
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{
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if (required_oldval == 0 && TARGET_OCTEON)
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{
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@ -12206,7 +12167,7 @@ mips_process_sync_loop (rtx insn, rtx *operands)
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mips_multi_add_insn ("li\t%0,1", cmp, NULL);
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/* Output the acquire side of the memory barrier. */
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if (TARGET_SYNC_AFTER_SC && mips_emit_post_atomic_barrier_p (model))
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if (TARGET_SYNC_AFTER_SC && need_atomic_barrier_p (model, false))
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mips_multi_add_insn ("sync", NULL);
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/* Output the exit label, if needed. */
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@ -2593,20 +2593,8 @@ tilegx_expand_tablejump (rtx op0, rtx op1)
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void
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tilegx_pre_atomic_barrier (enum memmodel model)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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case MEMMODEL_ACQUIRE:
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break;
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case MEMMODEL_RELEASE:
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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emit_insn (gen_memory_barrier ());
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break;
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default:
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gcc_unreachable ();
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}
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if (need_atomic_barrier_p (model, true))
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emit_insn (gen_memory_barrier ());
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}
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@ -2614,20 +2602,8 @@ tilegx_pre_atomic_barrier (enum memmodel model)
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void
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tilegx_post_atomic_barrier (enum memmodel model)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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case MEMMODEL_RELEASE:
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break;
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case MEMMODEL_ACQUIRE:
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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emit_insn (gen_memory_barrier ());
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break;
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default:
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gcc_unreachable ();
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}
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if (need_atomic_barrier_p (model, false))
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emit_insn (gen_memory_barrier ());
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}
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@ -6161,4 +6161,29 @@ locator_eq (int loc1, int loc2)
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return locator_scope (loc1) == locator_scope (loc2);
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}
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/* Return true if memory model MODEL requires a pre-operation (release-style)
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barrier or a post-operation (acquire-style) barrier. While not universal,
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this function matches behavior of several targets. */
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bool
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need_atomic_barrier_p (enum memmodel model, bool pre)
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{
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switch (model)
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{
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case MEMMODEL_RELAXED:
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case MEMMODEL_CONSUME:
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return false;
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case MEMMODEL_RELEASE:
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return pre;
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case MEMMODEL_ACQUIRE:
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return !pre;
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case MEMMODEL_ACQ_REL:
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case MEMMODEL_SEQ_CST:
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return true;
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default:
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gcc_unreachable ();
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}
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}
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#include "gt-emit-rtl.h"
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@ -69,6 +69,8 @@ extern void set_reg_attrs_for_decl_rtl (tree t, rtx x);
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extern void adjust_reg_mode (rtx, enum machine_mode);
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extern int mem_expr_equal_p (const_tree, const_tree);
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extern bool need_atomic_barrier_p (enum memmodel, bool);
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/* Return the first insn of the current sequence or current function. */
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static inline rtx
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