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[sched-deps] Remove needless check for modified_in_p when trying to fuse two non-conditional jump insns

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* sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p
	in the not conditional jump case.
	* doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
	* target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.

	* gcc.target/aarch64/fuse_adrp_add_1.c: New test.

From-SVN: r218012
This commit is contained in:
Kyrylo Tkachov 2014-11-24 11:09:59 +00:00 committed by Kyrylo Tkachov
parent a9a318b031
commit 892d9879a8
6 changed files with 71 additions and 12 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p
in the not conditional jump case.
* doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
* target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c: Include tm-constrs.h

12
gcc/doc/tm.texi
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@ -6484,11 +6484,13 @@ cycle. These other insns can then be taken into account properly.
This hook is used to check whether target platform supports macro fusion.
@end deftypefn
@deftypefn {Target Hook} bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx_insn *@var{condgen}, rtx_insn *@var{condjmp})
This hook is used to check whether two insns could be macro fused for
target microarchitecture. If this hook returns true for the given insn pair
(@var{condgen} and @var{condjmp}), scheduler will put them into a sched
group, and they will not be scheduled apart.
@deftypefn {Target Hook} bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx_insn *@var{prev}, rtx_insn *@var{curr})
This hook is used to check whether two insns should be macro fused for
a target microarchitecture. If this hook returns true for the given insn pair
(@var{prev} and @var{curr}), the scheduler will put them into a sched
group, and they will not be scheduled apart. The two insns will be either
two SET insns or a compare and a conditional jump and this hook should
validate any dependencies needed to fuse the two insns together.
@end deftypefn
@deftypefn {Target Hook} void TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK (rtx_insn *@var{head}, rtx_insn *@var{tail})

3
gcc/sched-deps.c
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@ -2877,8 +2877,7 @@ sched_macro_fuse_insns (rtx_insn *insn)
prev = prev_nonnote_nondebug_insn (insn);
if (!prev
|| !insn_set
|| !single_set (prev)
|| !modified_in_p (SET_DEST (insn_set), prev))
|| !single_set (prev))
return;
}

12
gcc/target.def
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@ -1067,11 +1067,13 @@ DEFHOOK
DEFHOOK
(macro_fusion_pair_p,
"This hook is used to check whether two insns could be macro fused for\n\
target microarchitecture. If this hook returns true for the given insn pair\n\
(@var{condgen} and @var{condjmp}), scheduler will put them into a sched\n\
group, and they will not be scheduled apart.",
bool, (rtx_insn *condgen, rtx_insn *condjmp), NULL)
"This hook is used to check whether two insns should be macro fused for\n\
a target microarchitecture. If this hook returns true for the given insn pair\n\
(@var{prev} and @var{curr}), the scheduler will put them into a sched\n\
group, and they will not be scheduled apart. The two insns will be either\n\
two SET insns or a compare and a conditional jump and this hook should\n\
validate any dependencies needed to fuse the two insns together.",
bool, (rtx_insn *prev, rtx_insn *curr), NULL)
/* The following member value is a pointer to a function called
after evaluation forward dependencies of insns in chain given

4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/fuse_adrp_add_1.c: New test.
2014-11-24 Richard Biener <rguenther@suse.de>
PR testsuite/64039

45
gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c Normal file
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@ -0,0 +1,45 @@
/* { dg-do compile } */
/* { dg-options "-O3 -mcpu=cortex-a57" } */
enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
enum rtx_code { REG, LAST_AND_UNUSED_RTX_CODE };
typedef union rtunion_def
{
int rtint;
} rtunion;
typedef struct rtx_def
{
unsigned int volatil : 1;
rtunion fld[1];
} *rtx;
extern char fixed_regs[64];
extern char global_regs[64];
int
rtx_cost (rtx x, int outer_code)
{
register enum rtx_code code;
switch (code)
{
case REG:
return ! ((((x)->volatil) && ((x)->fld[0].rtint) < 64)
|| ((((x)->fld[0].rtint)) == 30 || (((x)->fld[0].rtint)) == 30
|| (((x)->fld[0].rtint)) == 31 || (((x)->fld[0].rtint)) == 0
|| ((((x)->fld[0].rtint)) >= (64)
&& (((x)->fld[0].rtint)) <= (((64)) + 3))
|| ((((x)->fld[0].rtint)) < 64 && ((((x)->fld[0].rtint)) == 30
|| (((x)->fld[0].rtint)) == 30 || fixed_regs[((x)->fld[0].rtint)]
|| global_regs[((x)->fld[0].rtint)])
&& ((((x)->fld[0].rtint))
? ((((x)->fld[0].rtint) < 32)
? GENERAL_REGS : XRF_REGS)
: AP_REG) != NO_REGS)));
}
}
/* { dg-final { scan-assembler "adrp\tx.*, fixed_regs\n\tadd\tx.*, x.*fixed_regs" } } */