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emit-rtl.c (need_atomic_barrier_p): Mask memory model argument with MEMMODEL_MASK before comparing with MEMMODEL_*...

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* emit-rtl.c (need_atomic_barrier_p): Mask memory model argument
	with MEMMODEL_MASK before comparing with MEMMODEL_* memory types.
	* optabs.c (maybe_emit_sync_lock_test_and_set): Ditto.
	(expand_mem_thread_fence): Ditto.
	(expand_mem_signal_fence): Ditto.
	(expand_atomic_load): Ditto.
	(expand_atomic_store): Ditto.

From-SVN: r195228
This commit is contained in:
Uros Bizjak 2013-01-16 08:10:21 +01:00
parent 5147bf6a23
commit 88e784e6c2
3 changed files with 21 additions and 11 deletions

14
gcc/ChangeLog

@ -1,3 +1,13 @@
2013-01-15 Uros Bizjak <ubizjak@gmail.com>
* emit-rtl.c (need_atomic_barrier_p): Mask memory model argument
with MEMMODEL_MASK before comparing with MEMMODEL_* memory types.
* optabs.c (maybe_emit_sync_lock_test_and_set): Ditto.
(expand_mem_thread_fence): Ditto.
(expand_mem_signal_fence): Ditto.
(expand_atomic_load): Ditto.
(expand_atomic_store): Ditto.
2013-01-16 Alexandre Oliva <aoliva@redhat.com>
PR rtl-optimization/55547
@ -120,8 +130,8 @@
2013-01-14 Tejas Belagod <tejas.belagod@arm.com>
* config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r<mode>): New.
* config/aarch64/iterators.md (VALLDI): New.
* config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r<mode>): New.
* config/aarch64/iterators.md (VALLDI): New.
2012-01-14 Uros Bizjak <ubizjak@gmail.com>
Andi Kleen <ak@linux.intel.com>

2
gcc/emit-rtl.c

@ -6019,7 +6019,7 @@ insn_file (const_rtx insn)
bool
need_atomic_barrier_p (enum memmodel model, bool pre)
{
switch (model)
switch (model & MEMMODEL_MASK)
{
case MEMMODEL_RELAXED:
case MEMMODEL_CONSUME:

16
gcc/optabs.c

@ -7008,9 +7008,9 @@ maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
exists, and the memory model is stronger than acquire, add a release
barrier before the instruction. */
if (model == MEMMODEL_SEQ_CST
|| model == MEMMODEL_RELEASE
|| model == MEMMODEL_ACQ_REL)
if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST
|| (model & MEMMODEL_MASK) == MEMMODEL_RELEASE
|| (model & MEMMODEL_MASK) == MEMMODEL_ACQ_REL)
expand_mem_thread_fence (model);
if (icode != CODE_FOR_nothing)
@ -7388,7 +7388,7 @@ expand_mem_thread_fence (enum memmodel model)
{
if (HAVE_mem_thread_fence)
emit_insn (gen_mem_thread_fence (GEN_INT (model)));
else if (model != MEMMODEL_RELAXED)
else if ((model & MEMMODEL_MASK) != MEMMODEL_RELAXED)
{
if (HAVE_memory_barrier)
emit_insn (gen_memory_barrier ());
@ -7412,7 +7412,7 @@ expand_mem_signal_fence (enum memmodel model)
{
if (HAVE_mem_signal_fence)
emit_insn (gen_mem_signal_fence (GEN_INT (model)));
else if (model != MEMMODEL_RELAXED)
else if ((model & MEMMODEL_MASK) != MEMMODEL_RELAXED)
{
/* By default targets are coherent between a thread and the signal
handler running on the same thread. Thus this really becomes a
@ -7467,7 +7467,7 @@ expand_atomic_load (rtx target, rtx mem, enum memmodel model)
target = gen_reg_rtx (mode);
/* For SEQ_CST, emit a barrier before the load. */
if (model == MEMMODEL_SEQ_CST)
if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
expand_mem_thread_fence (model);
emit_move_insn (target, mem);
@ -7513,7 +7513,7 @@ expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release)
if (maybe_expand_insn (icode, 2, ops))
{
/* lock_release is only a release barrier. */
if (model == MEMMODEL_SEQ_CST)
if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
expand_mem_thread_fence (model);
return const0_rtx;
}
@ -7540,7 +7540,7 @@ expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release)
emit_move_insn (mem, val);
/* For SEQ_CST, also emit a barrier after the store. */
if (model == MEMMODEL_SEQ_CST)
if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
expand_mem_thread_fence (model);
return const0_rtx;