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configure.in (hppa configurations): Add pa32-regs.h to the list of tm files as appropriate.
* configure.in (hppa configurations): Add pa32-regs.h to the
list of tm files as appropriate.
* configure: Rebuilt.
* pa.c (compute_frame_size): Remove explicit knowledge about FP
register numbering.
(hppa_expand_prologue, hppa_expand_epilogue): Likewise.
(fmpyaddoperands, fmpysuboperands): Likewise.
* pa.h: Remove various definitions which depend on knowing
how registers are numbered.
* pa32-regs.h: New file with PA32 register numbering specific
definitions.
From-SVN: r32527
This commit is contained in:
Jeffrey A Law
Jeff Law
parent
1e7f0a48cf
commit
88624c0e27
@ -1,3 +1,17 @@
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Tue Mar 14 08:42:21 2000 Jeffrey A Law (law@cygnus.com)
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* configure.in (hppa configurations): Add pa32-regs.h to the
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list of tm files as appropriate.
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* configure: Rebuilt.
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* pa.c (compute_frame_size): Remove explicit knowledge about FP
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register numbering.
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(hppa_expand_prologue, hppa_expand_epilogue): Likewise.
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(fmpyaddoperands, fmpysuboperands): Likewise.
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* pa.h: Remove various definitions which depend on knowing
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how registers are numbered.
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* pa32-regs.h: New file with PA32 register numbering specific
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definitions.
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2000-03-14 Richard Henderson <rth@cygnus.com>
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* regmove.c (combine_stack_adjustments): New.
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@ -2675,7 +2675,7 @@ compute_frame_size (size, fregs_live)
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fsize = (fsize + 7) & ~7;
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/* Account for space used by the callee floating point register saves. */
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for (i = 66; i >= 48; i -= 2)
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for (i = FP_SAVED_REG_LAST; i >= FP_SAVED_REG_FIRST; i -= FP_REG_STEP)
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if (regs_ever_live[i] || regs_ever_live[i + 1])
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{
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if (fregs_live)
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@ -2980,7 +2980,7 @@ hppa_expand_prologue()
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set_reg_plus_d (1, STACK_POINTER_REGNUM, offset);
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/* Now actually save the FP registers. */
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for (i = 66; i >= 48; i -= 2)
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for (i = FP_SAVED_REG_LAST; i >= FP_SAVED_REG_FIRST; i -= FP_REG_STEP)
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{
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if (regs_ever_live[i] || regs_ever_live[i + 1])
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{
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@ -3118,7 +3118,7 @@ hppa_expand_epilogue ()
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set_reg_plus_d (1, STACK_POINTER_REGNUM, offset);
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/* Actually do the restores now. */
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for (i = 66; i >= 48; i -= 2)
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for (i = FP_SAVED_REG_LAST; i >= FP_SAVED_REG_FIRST; i -= FP_REG_STEP)
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{
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if (regs_ever_live[i] || regs_ever_live[i + 1])
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{
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@ -5698,12 +5698,12 @@ fmpyaddoperands (operands)
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/* SFmode limits the registers to the upper 32 of the 32bit FP regs. */
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if (mode == SFmode
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&& (REGNO (operands[0]) < 57
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|| REGNO (operands[1]) < 57
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|| REGNO (operands[2]) < 57
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|| REGNO (operands[3]) < 57
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|| REGNO (operands[4]) < 57
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|| REGNO (operands[5]) < 57))
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&& (REGNO_REG_CLASS (REGNO (operands[0])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[1])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[2])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[3])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[4])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[5])) != FPUPPER_REGS))
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return 0;
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/* Passed. Operands are suitable for fmpyadd. */
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@ -5755,12 +5755,12 @@ fmpysuboperands (operands)
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/* SFmode limits the registers to the upper 32 of the 32bit FP regs. */
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if (mode == SFmode
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&& (REGNO (operands[0]) < 57
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|| REGNO (operands[1]) < 57
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|| REGNO (operands[2]) < 57
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|| REGNO (operands[3]) < 57
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|| REGNO (operands[4]) < 57
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|| REGNO (operands[5]) < 57))
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&& (REGNO_REG_CLASS (REGNO (operands[0])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[1])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[2])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[3])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[4])) != FPUPPER_REGS
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|| REGNO_REG_CLASS (REGNO (operands[5])) != FPUPPER_REGS))
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return 0;
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/* Passed. Operands are suitable for fmpysub. */
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@ -227,18 +227,6 @@ extern int target_flags;
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#define ASM_STABS_OP "\t.stabs"
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#define ASM_STABN_OP "\t.stabn"
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/* How to renumber registers for dbx and gdb.
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Registers 0 - 31 remain unchanged.
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Registers 32 - 87 are mapped to 72 - 127
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Register 88 is mapped to 32. */
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#define DBX_REGISTER_NUMBER(REGNO) \
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((REGNO) <= 31 ? (REGNO) : \
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((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
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/* GDB always assumes the current function's frame begins at the value
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of the stack pointer upon entry to the current function. Accessing
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local variables and parameters passed on the stack is done using the
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@ -390,189 +378,6 @@ extern int target_flags;
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/* Generate calls to memcpy, memcmp and memset. */
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#define TARGET_MEM_FUNCTIONS
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/* Standard register usage. */
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/* Number of actual hardware registers.
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The hardware registers are assigned numbers for the compiler
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from 0 to just below FIRST_PSEUDO_REGISTER.
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All registers that the compiler knows about must be given numbers,
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even those that are not normally considered general registers.
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HP-PA 1.0 has 32 fullword registers and 16 floating point
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registers. The floating point registers hold either word or double
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word values.
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16 additional registers are reserved.
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HP-PA 1.1 has 32 fullword registers and 32 floating point
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registers. However, the floating point registers behave
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differently: the left and right halves of registers are addressable
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as 32 bit registers. So, we will set things up like the 68k which
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has different fp units: define separate register sets for the 1.0
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and 1.1 fp units. */
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#define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
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+ 1 shift reg */
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/* 1 for registers that have pervasive standard uses
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and are not available for the register allocator.
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On the HP-PA, these are:
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Reg 0 = 0 (hardware). However, 0 is used for condition code,
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so is not fixed.
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Reg 1 = ADDIL target/Temporary (hardware).
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Reg 2 = Return Pointer
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Reg 3 = Frame Pointer
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Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
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Reg 4-18 = Preserved Registers
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Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
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Reg 20-22 = Temporary Registers
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Reg 23-26 = Temporary/Parameter Registers
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Reg 27 = Global Data Pointer (hp)
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Reg 28 = Temporary/Return Value register
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Reg 29 = Temporary/Static Chain/Return Value register #2
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Reg 30 = stack pointer
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Reg 31 = Temporary/Millicode Return Pointer (hp)
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Freg 0-3 = Status Registers -- Not known to the compiler.
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Freg 4-7 = Arguments/Return Value
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Freg 8-11 = Temporary Registers
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Freg 12-15 = Preserved Registers
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Freg 16-31 = Reserved
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On the Snake, fp regs are
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Freg 0-3 = Status Registers -- Not known to the compiler.
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Freg 4L-7R = Arguments/Return Value
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Freg 8L-11R = Temporary Registers
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Freg 12L-21R = Preserved Registers
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Freg 22L-31R = Temporary Registers
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*/
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#define FIXED_REGISTERS \
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{0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 1, 0, 0, 1, 0, \
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/* fp registers */ \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0}
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/* 1 for registers not available across function calls.
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These must include the FIXED_REGISTERS and also any
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registers that can be used without being saved.
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The latter must include the registers where values are returned
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and the register where structure-value addresses are passed.
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Aside from that, you can include as many other registers as you like. */
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#define CALL_USED_REGISTERS \
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{1, 1, 1, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 1, 1, 1, 1, 1, \
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1, 1, 1, 1, 1, 1, 1, 1, \
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/* fp registers */ \
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1, 1, 1, 1, 1, 1, 1, 1, \
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1, 1, 1, 1, 1, 1, 1, 1, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 1, 1, 1, 1, \
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1, 1, 1, 1, 1, 1, 1, 1, \
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1, 1, 1, 1, 1, 1, 1, 1, \
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1}
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#define CONDITIONAL_REGISTER_USAGE \
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{ \
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if (!TARGET_PA_11) \
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{ \
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for (i = 56; i < 88; i++) \
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fixed_regs[i] = call_used_regs[i] = 1; \
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for (i = 33; i < 88; i += 2) \
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fixed_regs[i] = call_used_regs[i] = 1; \
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} \
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if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
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{ \
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for (i = 32; i < 88; i++) \
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fixed_regs[i] = call_used_regs[i] = 1; \
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} \
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if (flag_pic) \
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{ \
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fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
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fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\
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} \
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}
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/* Allocate the call used registers first. This should minimize
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the number of registers that need to be saved (as call used
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registers will generally not be allocated across a call).
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Experimentation has shown slightly better results by allocating
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FP registers first.
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FP registers are ordered so that all L registers are selected before
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R registers. This works around a false dependency interlock on the
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PA8000 when accessing the high and low parts of an FP register
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independently. */
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#define REG_ALLOC_ORDER \
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{ \
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/* caller-saved fp regs. */ \
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68, 70, 72, 74, 76, 78, 80, 82, \
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84, 86, 40, 42, 44, 46, 32, 34, \
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36, 38, \
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69, 71, 73, 75, 77, 79, 81, 83, \
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85, 87, 41, 43, 45, 47, 33, 35, \
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37, 39, \
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/* caller-saved general regs. */ \
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19, 20, 21, 22, 23, 24, 25, 26, \
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27, 28, 29, 31, 2, \
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/* callee-saved fp regs. */ \
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48, 50, 52, 54, 56, 58, 60, 62, \
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64, 66, \
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49, 51, 53, 55, 57, 59, 61, 63, \
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65, 67, \
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/* callee-saved general regs. */ \
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3, 4, 5, 6, 7, 8, 9, 10, \
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11, 12, 13, 14, 15, 16, 17, 18, \
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/* special registers. */ \
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1, 30, 0, 88}
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/* True if register is floating-point. */
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#define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
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/* Return number of consecutive hard regs needed starting at reg REGNO
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to hold something of mode MODE.
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This is ordinarily the length in words of a value of mode MODE
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but can be less for certain modes in special long registers.
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On the HP-PA, ordinary registers hold 32 bits worth;
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The floating point registers are 64 bits wide. Snake fp regs are 32
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bits wide */
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#define HARD_REGNO_NREGS(REGNO, MODE) \
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(FP_REGNO_P (REGNO) \
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? (!TARGET_PA_11 ? 1 : (GET_MODE_SIZE (MODE) + 4 - 1) / 4) \
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: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
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/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
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On the HP-PA, the cpu registers can hold any mode. We
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force this to be an even register is it cannot hold the full mode. */
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
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/* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
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: !TARGET_PA_11 && FP_REGNO_P (REGNO) \
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? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
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: FP_REGNO_P (REGNO) \
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? GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0 \
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/* Make wide modes be in aligned registers. */ \
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: GET_MODE_SIZE (MODE) <= UNITS_PER_WORD || ((REGNO) & 1) == 0)
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/* Value is 1 if it is a good idea to tie two pseudo registers
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when one has mode MODE1 and one has mode MODE2.
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@ -631,86 +436,6 @@ extern int target_flags;
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is passed to a function. */
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#define STRUCT_VALUE_REGNUM 28
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/* Define the classes of registers for register constraints in the
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machine description. Also define ranges of constants.
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One of the classes must always be named ALL_REGS and include all hard regs.
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If there is more than one class, another class must be named NO_REGS
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and contain no registers.
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The name GENERAL_REGS must be the name of a class (or an alias for
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another name such as ALL_REGS). This is the class of registers
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that is allowed by "g" or "r" in a register constraint.
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Also, registers outside this class are allocated only when
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instructions express preferences for them.
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The classes must be numbered in nondecreasing order; that is,
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a larger-numbered class must never be contained completely
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in a smaller-numbered class.
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For any two classes, it is very desirable that there be another
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class that represents their union. */
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/* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
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1.1 fp regs, and the high 1.1 fp regs, to which the operands of
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fmpyadd and fmpysub are restricted. */
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enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
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SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
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#define N_REG_CLASSES (int) LIM_REG_CLASSES
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/* Give names of register classes as strings for dump file. */
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#define REG_CLASS_NAMES \
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{"NO_REGS", "R1_REGS", "GENERAL_REGS", "FPUPPER_REGS", "FP_REGS", \
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"GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
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|
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/* Define which registers fit in which classes.
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This is an initializer for a vector of HARD_REG_SET
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of length N_REG_CLASSES. Register 0, the "condition code" register,
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is in no class. */
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#define REG_CLASS_CONTENTS \
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{{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
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{0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
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{0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
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{0x00000000, 0xff000000, 0x00ffffff}, /* FPUPPER_REGS */ \
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{0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
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{0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
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{0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
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{0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
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|
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/* The same information, inverted:
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Return the class number of the smallest class containing
|
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reg number REGNO. This could be a conditional expression
|
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or could index an array. */
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#define REGNO_REG_CLASS(REGNO) \
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((REGNO) == 0 ? NO_REGS \
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: (REGNO) == 1 ? R1_REGS \
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: (REGNO) < 32 ? GENERAL_REGS \
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: (REGNO) < 56 ? FP_REGS \
|
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: (REGNO) < 88 ? FPUPPER_REGS \
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: SHIFT_REGS)
|
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|
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/* The class value for index registers, and the one for base regs. */
|
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#define INDEX_REG_CLASS GENERAL_REGS
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#define BASE_REG_CLASS GENERAL_REGS
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|
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#define FP_REG_CLASS_P(CLASS) \
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((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
|
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|
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/* Get reg_class from a letter such as appears in the machine description. */
|
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/* Keep 'x' for backward compatibility with user asm. */
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#define REG_CLASS_FROM_LETTER(C) \
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((C) == 'f' ? FP_REGS : \
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(C) == 'y' ? FPUPPER_REGS : \
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(C) == 'x' ? FP_REGS : \
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(C) == 'q' ? SHIFT_REGS : \
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(C) == 'a' ? R1_REGS : \
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(C) == 'Z' ? ALL_REGS : NO_REGS)
|
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|
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/* The letters I, J, K, L and M in a register constraint string
|
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can be used to stand for particular ranges of immediate operands.
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This macro defines what the ranges are.
|
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@ -747,6 +472,16 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_
|
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&& (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
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: 0)
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|
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/* The class value for index registers, and the one for base regs. */
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#define INDEX_REG_CLASS GENERAL_REGS
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#define BASE_REG_CLASS GENERAL_REGS
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#define FP_REG_CLASS_P(CLASS) \
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((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
|
||||
|
||||
/* True if register is floating-point. */
|
||||
#define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
|
||||
|
||||
/* Given an rtx X being reloaded into a reg required to be
|
||||
in class CLASS, return the class of reg to actually use.
|
||||
In general this is just CLASS; but on some machines
|
||||
@ -773,13 +508,6 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_
|
||||
#define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
|
||||
gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
|
||||
|
||||
/* Return the maximum number of consecutive registers
|
||||
needed to represent mode MODE in a register of class CLASS. */
|
||||
#define CLASS_MAX_NREGS(CLASS, MODE) \
|
||||
((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS \
|
||||
? (!TARGET_PA_11 ? 1 : (GET_MODE_SIZE (MODE) + 4 - 1) / 4) \
|
||||
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
|
||||
|
||||
|
||||
/* Stack layout; function entry, exit and calling. */
|
||||
|
||||
@ -855,7 +583,6 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_
|
||||
/* On the HP-PA the value is found in register(s) 28(-29), unless
|
||||
the mode is SF or DF. Then the value is returned in fr4 (32, ) */
|
||||
|
||||
|
||||
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
||||
gen_rtx_REG (TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
|
||||
&& (TYPE_MODE (VALTYPE) == SFmode || \
|
||||
@ -876,10 +603,6 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_
|
||||
#define FUNCTION_VALUE_REGNO_P(N) \
|
||||
((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
|
||||
|
||||
/* 1 if N is a possible register number for function argument passing. */
|
||||
|
||||
#define FUNCTION_ARG_REGNO_P(N) \
|
||||
(((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
|
||||
|
||||
/* Define a data type for recording info about an argument list
|
||||
during the scan of that argument list. This data type should
|
||||
@ -1897,33 +1620,6 @@ while (0)
|
||||
|
||||
#define ASM_APP_OFF ""
|
||||
|
||||
/* How to refer to registers in assembler output.
|
||||
This sequence is indexed by compiler's hard-register-number (see above). */
|
||||
|
||||
#define REGISTER_NAMES \
|
||||
{"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
|
||||
"%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
|
||||
"%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
|
||||
"%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
|
||||
"%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
|
||||
"%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
|
||||
"%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
|
||||
"%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
|
||||
"%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
|
||||
"%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
|
||||
"%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
|
||||
"SAR"}
|
||||
|
||||
#define ADDITIONAL_REGISTER_NAMES \
|
||||
{{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
|
||||
{"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
|
||||
{"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
|
||||
{"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
|
||||
{"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
|
||||
{"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
|
||||
{"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
|
||||
{"%cr11",88}}
|
||||
|
||||
/* This is how to output the definition of a user-level label named NAME,
|
||||
such as the label on a static function or variable NAME. */
|
||||
|
||||
|
||||
316
gcc/config/pa/pa32-regs.h
Normal file
316
gcc/config/pa/pa32-regs.h
Normal file
@ -0,0 +1,316 @@
|
||||
/* Standard register usage. */
|
||||
|
||||
/* Number of actual hardware registers.
|
||||
The hardware registers are assigned numbers for the compiler
|
||||
from 0 to just below FIRST_PSEUDO_REGISTER.
|
||||
All registers that the compiler knows about must be given numbers,
|
||||
even those that are not normally considered general registers.
|
||||
|
||||
HP-PA 1.0 has 32 fullword registers and 16 floating point
|
||||
registers. The floating point registers hold either word or double
|
||||
word values.
|
||||
|
||||
16 additional registers are reserved.
|
||||
|
||||
HP-PA 1.1 has 32 fullword registers and 32 floating point
|
||||
registers. However, the floating point registers behave
|
||||
differently: the left and right halves of registers are addressable
|
||||
as 32 bit registers. So, we will set things up like the 68k which
|
||||
has different fp units: define separate register sets for the 1.0
|
||||
and 1.1 fp units. */
|
||||
|
||||
#define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
|
||||
+ 1 shift reg */
|
||||
|
||||
/* 1 for registers that have pervasive standard uses
|
||||
and are not available for the register allocator.
|
||||
|
||||
On the HP-PA, these are:
|
||||
Reg 0 = 0 (hardware). However, 0 is used for condition code,
|
||||
so is not fixed.
|
||||
Reg 1 = ADDIL target/Temporary (hardware).
|
||||
Reg 2 = Return Pointer
|
||||
Reg 3 = Frame Pointer
|
||||
Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
|
||||
Reg 4-18 = Preserved Registers
|
||||
Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
|
||||
Reg 20-22 = Temporary Registers
|
||||
Reg 23-26 = Temporary/Parameter Registers
|
||||
Reg 27 = Global Data Pointer (hp)
|
||||
Reg 28 = Temporary/Return Value register
|
||||
Reg 29 = Temporary/Static Chain/Return Value register #2
|
||||
Reg 30 = stack pointer
|
||||
Reg 31 = Temporary/Millicode Return Pointer (hp)
|
||||
|
||||
Freg 0-3 = Status Registers -- Not known to the compiler.
|
||||
Freg 4-7 = Arguments/Return Value
|
||||
Freg 8-11 = Temporary Registers
|
||||
Freg 12-15 = Preserved Registers
|
||||
|
||||
Freg 16-31 = Reserved
|
||||
|
||||
On the Snake, fp regs are
|
||||
|
||||
Freg 0-3 = Status Registers -- Not known to the compiler.
|
||||
Freg 4L-7R = Arguments/Return Value
|
||||
Freg 8L-11R = Temporary Registers
|
||||
Freg 12L-21R = Preserved Registers
|
||||
Freg 22L-31R = Temporary Registers
|
||||
|
||||
*/
|
||||
|
||||
#define FIXED_REGISTERS \
|
||||
{0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 1, 0, 0, 1, 0, \
|
||||
/* fp registers */ \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0}
|
||||
|
||||
/* 1 for registers not available across function calls.
|
||||
These must include the FIXED_REGISTERS and also any
|
||||
registers that can be used without being saved.
|
||||
The latter must include the registers where values are returned
|
||||
and the register where structure-value addresses are passed.
|
||||
Aside from that, you can include as many other registers as you like. */
|
||||
#define CALL_USED_REGISTERS \
|
||||
{1, 1, 1, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
/* fp registers */ \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 0, 0, 0, 0, \
|
||||
0, 0, 0, 0, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1, \
|
||||
1}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
if (!TARGET_PA_11) \
|
||||
{ \
|
||||
for (i = 56; i < 88; i++) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
for (i = 33; i < 88; i += 2) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
|
||||
{ \
|
||||
for (i = 32; i < 88; i++) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
if (flag_pic) \
|
||||
{ \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\
|
||||
} \
|
||||
}
|
||||
|
||||
/* Allocate the call used registers first. This should minimize
|
||||
the number of registers that need to be saved (as call used
|
||||
registers will generally not be allocated across a call).
|
||||
|
||||
Experimentation has shown slightly better results by allocating
|
||||
FP registers first.
|
||||
|
||||
FP registers are ordered so that all L registers are selected before
|
||||
R registers. This works around a false dependency interlock on the
|
||||
PA8000 when accessing the high and low parts of an FP register
|
||||
independently. */
|
||||
|
||||
#define REG_ALLOC_ORDER \
|
||||
{ \
|
||||
/* caller-saved fp regs. */ \
|
||||
68, 70, 72, 74, 76, 78, 80, 82, \
|
||||
84, 86, 40, 42, 44, 46, 32, 34, \
|
||||
36, 38, \
|
||||
69, 71, 73, 75, 77, 79, 81, 83, \
|
||||
85, 87, 41, 43, 45, 47, 33, 35, \
|
||||
37, 39, \
|
||||
/* caller-saved general regs. */ \
|
||||
19, 20, 21, 22, 23, 24, 25, 26, \
|
||||
27, 28, 29, 31, 2, \
|
||||
/* callee-saved fp regs. */ \
|
||||
48, 50, 52, 54, 56, 58, 60, 62, \
|
||||
64, 66, \
|
||||
49, 51, 53, 55, 57, 59, 61, 63, \
|
||||
65, 67, \
|
||||
/* callee-saved general regs. */ \
|
||||
3, 4, 5, 6, 7, 8, 9, 10, \
|
||||
11, 12, 13, 14, 15, 16, 17, 18, \
|
||||
/* special registers. */ \
|
||||
1, 30, 0, 88}
|
||||
|
||||
|
||||
/* Return number of consecutive hard regs needed starting at reg REGNO
|
||||
to hold something of mode MODE.
|
||||
This is ordinarily the length in words of a value of mode MODE
|
||||
but can be less for certain modes in special long registers.
|
||||
|
||||
On the HP-PA, ordinary registers hold 32 bits worth;
|
||||
The floating point registers are 64 bits wide. Snake fp regs are 32
|
||||
bits wide */
|
||||
#define HARD_REGNO_NREGS(REGNO, MODE) \
|
||||
(FP_REGNO_P (REGNO) \
|
||||
? (!TARGET_PA_11 ? 1 : (GET_MODE_SIZE (MODE) + 4 - 1) / 4) \
|
||||
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
|
||||
|
||||
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
|
||||
On the HP-PA, the cpu registers can hold any mode. We
|
||||
force this to be an even register is it cannot hold the full mode. */
|
||||
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
|
||||
((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
|
||||
/* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
|
||||
: !TARGET_PA_11 && FP_REGNO_P (REGNO) \
|
||||
? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
|
||||
: FP_REGNO_P (REGNO) \
|
||||
? GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0 \
|
||||
/* Make wide modes be in aligned registers. */ \
|
||||
: (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD \
|
||||
|| GET_MODE_SIZE (MODE) <= 2 * UNITS_PER_WORD && ((REGNO) & 1) == 0))
|
||||
|
||||
/* How to renumber registers for dbx and gdb.
|
||||
|
||||
Registers 0 - 31 remain unchanged.
|
||||
|
||||
Registers 32 - 87 are mapped to 72 - 127
|
||||
|
||||
Register 88 is mapped to 32. */
|
||||
|
||||
#define DBX_REGISTER_NUMBER(REGNO) \
|
||||
((REGNO) <= 31 ? (REGNO) : \
|
||||
((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
|
||||
|
||||
/* Define the classes of registers for register constraints in the
|
||||
machine description. Also define ranges of constants.
|
||||
|
||||
One of the classes must always be named ALL_REGS and include all hard regs.
|
||||
If there is more than one class, another class must be named NO_REGS
|
||||
and contain no registers.
|
||||
|
||||
The name GENERAL_REGS must be the name of a class (or an alias for
|
||||
another name such as ALL_REGS). This is the class of registers
|
||||
that is allowed by "g" or "r" in a register constraint.
|
||||
Also, registers outside this class are allocated only when
|
||||
instructions express preferences for them.
|
||||
|
||||
The classes must be numbered in nondecreasing order; that is,
|
||||
a larger-numbered class must never be contained completely
|
||||
in a smaller-numbered class.
|
||||
|
||||
For any two classes, it is very desirable that there be another
|
||||
class that represents their union. */
|
||||
|
||||
/* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
|
||||
1.1 fp regs, and the high 1.1 fp regs, to which the operands of
|
||||
fmpyadd and fmpysub are restricted. */
|
||||
|
||||
enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
|
||||
GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
|
||||
|
||||
#define N_REG_CLASSES (int) LIM_REG_CLASSES
|
||||
|
||||
/* Give names of register classes as strings for dump file. */
|
||||
|
||||
#define REG_CLASS_NAMES \
|
||||
{"NO_REGS", "R1_REGS", "GENERAL_REGS", "FPUPPER_REGS", "FP_REGS", \
|
||||
"GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
|
||||
|
||||
/* Define which registers fit in which classes.
|
||||
This is an initializer for a vector of HARD_REG_SET
|
||||
of length N_REG_CLASSES. Register 0, the "condition code" register,
|
||||
is in no class. */
|
||||
|
||||
#define REG_CLASS_CONTENTS \
|
||||
{{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
|
||||
{0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
|
||||
{0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
|
||||
{0x00000000, 0xff000000, 0x00ffffff}, /* FPUPPER_REGS */ \
|
||||
{0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
|
||||
{0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
|
||||
{0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
|
||||
{0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
|
||||
|
||||
/* This may not actually be necessary anymore. But until I can prove
|
||||
otherwise it will stay. */
|
||||
#define CLASS_CANNOT_CHANGE_SIZE NO_REGS
|
||||
|
||||
/* The same information, inverted:
|
||||
Return the class number of the smallest class containing
|
||||
reg number REGNO. This could be a conditional expression
|
||||
or could index an array. */
|
||||
|
||||
#define REGNO_REG_CLASS(REGNO) \
|
||||
((REGNO) == 0 ? NO_REGS \
|
||||
: (REGNO) == 1 ? R1_REGS \
|
||||
: (REGNO) < 32 ? GENERAL_REGS \
|
||||
: (REGNO) < 56 ? FP_REGS \
|
||||
: (REGNO) < 88 ? FPUPPER_REGS \
|
||||
: (REGNO) < 88 ? FPUPPER_REGS \
|
||||
: SHIFT_REGS)
|
||||
|
||||
/* Get reg_class from a letter such as appears in the machine description. */
|
||||
/* Keep 'x' for backward compatibility with user asm. */
|
||||
#define REG_CLASS_FROM_LETTER(C) \
|
||||
((C) == 'f' ? FP_REGS : \
|
||||
(C) == 'y' ? FPUPPER_REGS : \
|
||||
(C) == 'y' ? FPUPPER_REGS : \
|
||||
(C) == 'x' ? FP_REGS : \
|
||||
(C) == 'q' ? SHIFT_REGS : \
|
||||
(C) == 'a' ? R1_REGS : \
|
||||
(C) == 'Z' ? ALL_REGS : NO_REGS)
|
||||
|
||||
/* Return the maximum number of consecutive registers
|
||||
needed to represent mode MODE in a register of class CLASS. */
|
||||
#define CLASS_MAX_NREGS(CLASS, MODE) \
|
||||
((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS \
|
||||
? (!TARGET_PA_11 ? 1 : (GET_MODE_SIZE (MODE) + 4 - 1) / 4) \
|
||||
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
|
||||
|
||||
/* 1 if N is a possible register number for function argument passing. */
|
||||
|
||||
#define FUNCTION_ARG_REGNO_P(N) \
|
||||
(((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
|
||||
|
||||
/* How to refer to registers in assembler output.
|
||||
This sequence is indexed by compiler's hard-register-number (see above). */
|
||||
|
||||
#define REGISTER_NAMES \
|
||||
{"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
|
||||
"%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
|
||||
"%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
|
||||
"%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
|
||||
"%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
|
||||
"%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
|
||||
"%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
|
||||
"%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
|
||||
"%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
|
||||
"%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
|
||||
"%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
|
||||
"SAR"}
|
||||
|
||||
#define ADDITIONAL_REGISTER_NAMES \
|
||||
{{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
|
||||
{"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
|
||||
{"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
|
||||
{"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
|
||||
{"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
|
||||
{"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
|
||||
{"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
|
||||
{"%cr11",88}}
|
||||
|
||||
#define FP_SAVED_REG_LAST 66
|
||||
#define FP_SAVED_REG_FIRST 48
|
||||
#define FP_REG_STEP 2
|
||||
#define FP_REG_FIRST 32
|
||||
#define FP_REG_LAST 87
|
||||
40
gcc/configure
vendored
40
gcc/configure
vendored
@ -3638,36 +3638,36 @@ for machine in $build $host $target; do
|
||||
;;
|
||||
hppa1.1-*-pro*)
|
||||
target_cpu_default="(MASK_JUMP_IN_DELAY | MASK_PORTABLE_RUNTIME | MASK_GAS | MASK_NO_SPACE_REGS | MASK_SOFT_FLOAT)"
|
||||
tm_file="${tm_file} elfos.h pa/elf.h pa/pa-pro-end.h libgloss.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h elfos.h pa/elf.h pa/pa-pro-end.h libgloss.h"
|
||||
xm_file=pa/xm-papro.h
|
||||
tmake_file=pa/t-pro
|
||||
;;
|
||||
hppa1.1-*-osf*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-osf.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-osf.h"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-rtems*)
|
||||
target_cpu_default="(MASK_JUMP_IN_DELAY | MASK_PORTABLE_RUNTIME | MASK_GAS | MASK_NO_SPACE_REGS | MASK_SOFT_FLOAT)"
|
||||
tm_file="${tm_file} elfos.h pa/elf.h pa/pa-pro-end.h libgloss.h pa/rtems.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h elfos.h pa/elf.h pa/pa-pro-end.h libgloss.h pa/rtems.h"
|
||||
xm_file=pa/xm-papro.h
|
||||
tmake_file=pa/t-pro
|
||||
;;
|
||||
hppa1.0-*-osf*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-osf.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-osf.h"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-bsd*)
|
||||
tm_file="${tm_file} pa/som.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-bsd*)
|
||||
tm_file="${tm_file} pa/som.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux7*)
|
||||
tm_file="pa/pa-oldas.h ${tm_file} pa/som.h pa/pa-hpux7.h"
|
||||
tm_file="pa/pa-oldas.h ${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux7.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3678,7 +3678,7 @@ for machine in $build $host $target; do
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux8.0[0-2]*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3692,7 +3692,7 @@ for machine in $build $host $target; do
|
||||
;;
|
||||
hppa1.1-*-hpux8.0[0-2]*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3706,7 +3706,7 @@ for machine in $build $host $target; do
|
||||
;;
|
||||
hppa1.1-*-hpux8*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3717,7 +3717,7 @@ for machine in $build $host $target; do
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux8*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3729,7 +3729,7 @@ for machine in $build $host $target; do
|
||||
;;
|
||||
hppa1.1-*-hpux10* | hppa2*-*-hpux10*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
float_format=i128
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
@ -3749,7 +3749,7 @@ for machine in $build $host $target; do
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux10*)
|
||||
tm_file="${tm_file} pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
float_format=i128
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
@ -3770,7 +3770,7 @@ for machine in $build $host $target; do
|
||||
;;
|
||||
hppa1.1-*-hpux11* | hppa2*-*-hpux11*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux11.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux11.h"
|
||||
float_format=i128
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
@ -3790,7 +3790,7 @@ for machine in $build $host $target; do
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux11*)
|
||||
tm_file="${tm_file} pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux11.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux11.h"
|
||||
float_format=i128
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
@ -3810,7 +3810,7 @@ for machine in $build $host $target; do
|
||||
;;
|
||||
hppa1.1-*-hpux* | hppa2*-*-hpux*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3821,7 +3821,7 @@ for machine in $build $host $target; do
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3833,7 +3833,7 @@ for machine in $build $host $target; do
|
||||
;;
|
||||
hppa1.1-*-hiux* | hppa2*-*-hiux*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h pa/pa-hiux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h pa/pa-hiux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3844,7 +3844,7 @@ for machine in $build $host $target; do
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hiux*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h pa/pa-hiux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h pa/pa-hiux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -3855,7 +3855,7 @@ for machine in $build $host $target; do
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa*-*-lites*)
|
||||
tm_file="${tm_file} elfos.h pa/elf.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h elfos.h pa/elf.h"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
use_collect2=yes
|
||||
;;
|
||||
|
||||
@ -902,36 +902,36 @@ changequote([,])dnl
|
||||
;;
|
||||
hppa1.1-*-pro*)
|
||||
target_cpu_default="(MASK_JUMP_IN_DELAY | MASK_PORTABLE_RUNTIME | MASK_GAS | MASK_NO_SPACE_REGS | MASK_SOFT_FLOAT)"
|
||||
tm_file="${tm_file} elfos.h pa/elf.h pa/pa-pro-end.h libgloss.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h elfos.h pa/elf.h pa/pa-pro-end.h libgloss.h"
|
||||
xm_file=pa/xm-papro.h
|
||||
tmake_file=pa/t-pro
|
||||
;;
|
||||
hppa1.1-*-osf*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-osf.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-osf.h"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-rtems*)
|
||||
target_cpu_default="(MASK_JUMP_IN_DELAY | MASK_PORTABLE_RUNTIME | MASK_GAS | MASK_NO_SPACE_REGS | MASK_SOFT_FLOAT)"
|
||||
tm_file="${tm_file} elfos.h pa/elf.h pa/pa-pro-end.h libgloss.h pa/rtems.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h elfos.h pa/elf.h pa/pa-pro-end.h libgloss.h pa/rtems.h"
|
||||
xm_file=pa/xm-papro.h
|
||||
tmake_file=pa/t-pro
|
||||
;;
|
||||
hppa1.0-*-osf*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-osf.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-osf.h"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.1-*-bsd*)
|
||||
tm_file="${tm_file} pa/som.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-bsd*)
|
||||
tm_file="${tm_file} pa/som.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h"
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux7*)
|
||||
tm_file="pa/pa-oldas.h ${tm_file} pa/som.h pa/pa-hpux7.h"
|
||||
tm_file="pa/pa-oldas.h ${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux7.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -944,7 +944,7 @@ changequote([,])dnl
|
||||
changequote(,)dnl
|
||||
hppa1.0-*-hpux8.0[0-2]*)
|
||||
changequote([,])dnl
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -960,7 +960,7 @@ changequote(,)dnl
|
||||
hppa1.1-*-hpux8.0[0-2]*)
|
||||
changequote([,])dnl
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -974,7 +974,7 @@ changequote([,])dnl
|
||||
;;
|
||||
hppa1.1-*-hpux8*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -985,7 +985,7 @@ changequote([,])dnl
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux8*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -997,7 +997,7 @@ changequote([,])dnl
|
||||
;;
|
||||
hppa1.1-*-hpux10* | hppa2*-*-hpux10*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
float_format=i128
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
@ -1017,7 +1017,7 @@ changequote([,])dnl
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux10*)
|
||||
tm_file="${tm_file} pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux10.h"
|
||||
float_format=i128
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
@ -1038,7 +1038,7 @@ changequote([,])dnl
|
||||
;;
|
||||
hppa1.1-*-hpux11* | hppa2*-*-hpux11*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux11.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux11.h"
|
||||
float_format=i128
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
@ -1058,7 +1058,7 @@ changequote([,])dnl
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux11*)
|
||||
tm_file="${tm_file} pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux11.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/long_double.h pa/som.h pa/pa-hpux.h pa/pa-hpux11.h"
|
||||
float_format=i128
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
@ -1078,7 +1078,7 @@ changequote([,])dnl
|
||||
;;
|
||||
hppa1.1-*-hpux* | hppa2*-*-hpux*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -1089,7 +1089,7 @@ changequote([,])dnl
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hpux*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h pa/pa-hpux9.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -1101,7 +1101,7 @@ changequote([,])dnl
|
||||
;;
|
||||
hppa1.1-*-hiux* | hppa2*-*-hiux*)
|
||||
target_cpu_default="MASK_PA_11"
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h pa/pa-hiux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h pa/pa-hiux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -1112,7 +1112,7 @@ changequote([,])dnl
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa1.0-*-hiux*)
|
||||
tm_file="${tm_file} pa/som.h pa/pa-hpux.h pa/pa-hiux.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h pa/som.h pa/pa-hpux.h pa/pa-hiux.h"
|
||||
xm_file=pa/xm-pahpux.h
|
||||
xmake_file=pa/x-pa-hpux
|
||||
if test x$gas = xyes
|
||||
@ -1123,7 +1123,7 @@ changequote([,])dnl
|
||||
use_collect2=yes
|
||||
;;
|
||||
hppa*-*-lites*)
|
||||
tm_file="${tm_file} elfos.h pa/elf.h"
|
||||
tm_file="${tm_file} pa/pa32-regs.h elfos.h pa/elf.h"
|
||||
target_cpu_default="MASK_PA_11"
|
||||
use_collect2=yes
|
||||
;;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user