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Piledriver f16cintrin.h fix.
2011-11-04 Quentin Neill <quentin.neill@amd.com> Piledriver f16cintrin.h fix. * config/i386/f16cintrin.h: Contents moved from immintrin.h. * config/config.gcc: Add f16cintrin.h. From-SVN: r180999
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Quentin Neill
Harsha Jagasia
parent
a73c1a724d
commit
87ca01b7be
@ -1,3 +1,9 @@
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2011-11-05 Quentin Neill <quentin.neill@amd.com>
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Piledriver f16cintrin.h fix.
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* config/i386/f16cintrin.h: Contents moved from immintrin.h.
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* config/config.gcc: Add f16cintrin.h.
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2011-11-04 Eric Botcazou <ebotcazou@adacore.com>
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PR c++/50608
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94
gcc/config/i386/f16cintrin.h
Normal file
94
gcc/config/i386/f16cintrin.h
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@ -0,0 +1,94 @@
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/* Copyright (C) 2011
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _X86INTRIN_H_INCLUDED
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#if (!defined(_X86INTRIN_H_INCLUDED) && !defined(_IMMINTRIN_H_INCLUDED))
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# error "Never use <f16intrin.h> directly; include <x86intrin.h> or <immintrin.h> instead."
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#endif
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#ifndef __F16C__
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# error "F16C instruction set not enabled"
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#else
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#ifndef _F16CINTRIN_H_INCLUDED
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#define _F16CINTRIN_H_INCLUDED
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extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_cvtsh_ss (unsigned short __S)
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{
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__v8hi __H = __extension__ (__v8hi){ __S, 0, 0, 0, 0, 0, 0, 0 };
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__v4sf __A = __builtin_ia32_vcvtph2ps (__H);
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return __builtin_ia32_vec_ext_v4sf (__A, 0);
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}
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extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_cvtph_ps (__m128i __A)
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{
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return (__m128) __builtin_ia32_vcvtph2ps ((__v8hi) __A);
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}
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extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_cvtph_ps (__m128i __A)
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{
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return (__m256) __builtin_ia32_vcvtph2ps256 ((__v8hi) __A);
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}
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#ifdef __OPTIMIZE__
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extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_cvtss_sh (float __F, const int __I)
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{
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__v4sf __A = __extension__ (__v4sf){ __F, 0, 0, 0 };
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__v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I);
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return (unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0);
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}
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extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_cvtps_ph (__m128 __A, const int __I)
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{
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return (__m128i) __builtin_ia32_vcvtps2ph ((__v4sf) __A, __I);
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}
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extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_cvtps_ph (__m256 __A, const int __I)
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{
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return (__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf) __A, __I);
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}
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#else
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#define _cvtss_sh(__F, __I) \
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(__extension__ \
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({ \
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__v4sf __A = __extension__ (__v4sf){ __F, 0, 0, 0 }; \
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__v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I); \
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(unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0); \
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}))
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#define _mm_cvtps_ph(A, I) \
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((__m128i) __builtin_ia32_vcvtps2ph ((__v4sf)(__m128) A, (int) (I)))
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#define _mm256_cvtps_ph(A, I) \
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((__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf)(__m256) A, (int) (I)))
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#endif
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#endif /* __F16C__ */
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#endif
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@ -76,6 +76,10 @@
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#include <fmaintrin.h>
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#endif
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#ifdef __F16C__
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#include <f16cintrin.h>
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#endif
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#ifdef __RDRND__
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extern __inline int
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -161,63 +165,4 @@ _rdrand64_step (unsigned long long *__P)
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#endif /* __RDRND__ */
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#endif /* __x86_64__ */
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#ifdef __F16C__
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extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_cvtsh_ss (unsigned short __S)
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{
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__v8hi __H = __extension__ (__v8hi){ __S, 0, 0, 0, 0, 0, 0, 0 };
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__v4sf __A = __builtin_ia32_vcvtph2ps (__H);
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return __builtin_ia32_vec_ext_v4sf (__A, 0);
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}
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extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_cvtph_ps (__m128i __A)
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{
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return (__m128) __builtin_ia32_vcvtph2ps ((__v8hi) __A);
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}
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extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_cvtph_ps (__m128i __A)
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{
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return (__m256) __builtin_ia32_vcvtph2ps256 ((__v8hi) __A);
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}
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#ifdef __OPTIMIZE__
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extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_cvtss_sh (float __F, const int __I)
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{
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__v4sf __A = __extension__ (__v4sf){ __F, 0, 0, 0 };
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__v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I);
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return (unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0);
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}
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extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_cvtps_ph (__m128 __A, const int __I)
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{
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return (__m128i) __builtin_ia32_vcvtps2ph ((__v4sf) __A, __I);
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}
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extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_cvtps_ph (__m256 __A, const int __I)
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{
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return (__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf) __A, __I);
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}
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#else
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#define _cvtss_sh(__F, __I) \
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(__extension__ \
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({ \
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__v4sf __A = __extension__ (__v4sf){ __F, 0, 0, 0 }; \
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__v8hi __H = __builtin_ia32_vcvtps2ph (__A, __I); \
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(unsigned short) __builtin_ia32_vec_ext_v8hi (__H, 0); \
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}))
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#define _mm_cvtps_ph(A, I) \
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((__m128i) __builtin_ia32_vcvtps2ph ((__v4sf)(__m128) A, (int) (I)))
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#define _mm256_cvtps_ph(A, I) \
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((__m128i) __builtin_ia32_vcvtps2ph256 ((__v8sf)(__m256) A, (int) (I)))
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#endif
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#endif /* __F16C__ */
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#endif /* _IMMINTRIN_H_INCLUDED */
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