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* alpha.md (ev5_e0): Conflict loads and stores.
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@ -3,6 +3,8 @@ Thu Mar 11 14:00:58 1999 Richard Henderson <rth@cygnus.com>
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* alpha.h (HARD_REGNO_MODE_OK): Disallow QI/HImode in fp regs.
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(MODES_TIEABLE_P): Update.
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* alpha.md (ev5_e0): Conflict loads and stores.
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Thu Mar 11 13:55:52 1999 Richard Henderson <rth@cygnus.com>
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* machmode.h (smallest_mode_for_size): Prototype.
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@ -155,13 +155,18 @@
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; Memory takes at least 2 clocks. Return one from here and fix up with
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; user-defined latencies in adjust_cost.
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; ??? How to: "An instruction of class LD cannot be issued in the _second_
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; cycle after an instruction of class ST is issued."
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(define_function_unit "ev5_ebox" 2 0
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(and (eq_attr "cpu" "ev5")
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(eq_attr "type" "ild,fld,ldsym"))
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1 1)
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; Loads can dual issue with one another, but loads and stores do not mix.
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(define_function_unit "ev5_e0" 1 0
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(and (eq_attr "cpu" "ev5")
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(eq_attr "type" "ild,fld,ldsym"))
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1 1
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[(eq_attr "type" "ist,fst")])
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; Stores, shifts, multiplies can only issue to E0
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(define_function_unit "ev5_e0" 1 0
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(and (eq_attr "cpu" "ev5")
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