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alpha.c: Follow spelling conventions.

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* config/alpha/alpha.c: Follow spelling conventions.
	* config/alpha/alpha.h: Likewise.
	* config/alpha/alpha.md: Likewise.
	* config/arc/arc.h: Likewise.
	* config/arm/arm.c: Likewise.
	* config/arm/arm.h: Likewise.
	* config/arm/arm.md: Likewise.
	* config/arm/pe.c: Likewise.
	* config/arm/unknown-elf.h: Likewise.
	* config/avr/avr.c: Likewise.
	* config/avr/avr.h: Likewise.
	* config/c4x/c4x.c: Likewise.
	* config/cris/cris.c: Likewise.
	* config/cris/cris.h: Likewise.

From-SVN: r57266
This commit is contained in:
Kazu Hirata 2002-09-17 23:10:04 +00:00 committed by Kazu Hirata
parent 8e16ab9995
commit 825dda426b
15 changed files with 64 additions and 45 deletions
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19
gcc/ChangeLog
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@ -1,9 +1,28 @@
2002-09-17 Kazu Hirata <kazu@cs.umass.edu>
* config/alpha/alpha.c: Follow spelling conventions.
* config/alpha/alpha.h: Likewise.
* config/alpha/alpha.md: Likewise.
* config/arc/arc.h: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/arm.h: Likewise.
* config/arm/arm.md: Likewise.
* config/arm/pe.c: Likewise.
* config/arm/unknown-elf.h: Likewise.
* config/avr/avr.c: Likewise.
* config/avr/avr.h: Likewise.
* config/c4x/c4x.c: Likewise.
* config/cris/cris.c: Likewise.
* config/cris/cris.h: Likewise.
2002-09-17 Samuel Figueroa <figueroa@apple.com>
* final.c (final_scan_insn): Use new macro ASM_OUTPUT_ALIGN_WITH_NOP.
* config/sparc/sparc.h (ASM_OUTPUT_ALIGN_WITH_NOP) New macro.
* doc/tm.texi (ASM_OUTPUT_ALIGN_WITH_NOP) New description.
2002-09-17 Dale Johannesen <dalej@apple.com>
* cfgcleanup.c (try_forward_edges): Do not forward a
branch to just after a loop exit before loop optimization;
this interfered with doloop detection.

8
gcc/config/alpha/alpha.c
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@ -88,7 +88,7 @@ const char *alpha_tls_size_string; /* -mtls-size=[16|32|64] */
struct alpha_compare alpha_compare;
/* Non-zero if inside of a function, because the Alpha asm can't
/* Nonzero if inside of a function, because the Alpha asm can't
handle .files inside of functions. */
static int inside_function = FALSE;
@ -3478,7 +3478,7 @@ alpha_emit_setcc (code)
/* Rewrite a comparison against zero CMP of the form
(CODE (cc0) (const_int 0)) so it can be written validly in
a conditional move (if_then_else CMP ...).
If both of the operands that set cc0 are non-zero we must emit
If both of the operands that set cc0 are nonzero we must emit
an insn to perform the compare (it can't be done within
the conditional move). */
rtx
@ -3510,7 +3510,7 @@ alpha_emit_conditional_move (cmp, mode)
/* If we have fp<->int register move instructions, do a cmov by
performing the comparison in fp registers, and move the
zero/non-zero value to integer registers, where we can then
zero/nonzero value to integer registers, where we can then
use a normal cmov, or vice-versa. */
switch (code)
@ -4042,7 +4042,7 @@ alpha_split_tfmode_frobsign (operands, operation)
alpha_split_tfmode_pair (operands);
/* Detect three flavours of operand overlap. */
/* Detect three flavors of operand overlap. */
move = 1;
if (rtx_equal_p (operands[0], operands[2]))
move = 0;

6
gcc/config/alpha/alpha.h
View File

@ -508,14 +508,14 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */
#define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
#endif
/* Set this non-zero if move instructions will actually fail to work
/* Set this nonzero if move instructions will actually fail to work
when given unaligned data.
Since we get an error message when we do one, call them invalid. */
#define STRICT_ALIGNMENT 1
/* Set this non-zero if unaligned move instructions are extremely slow.
/* Set this nonzero if unaligned move instructions are extremely slow.
On the Alpha, they trap. */
@ -1468,7 +1468,7 @@ do { \
#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
/* Nonzero if access to memory by bytes is no faster than for words.
Also non-zero if doing byte operations (specifically shifts) in registers
Also nonzero if doing byte operations (specifically shifts) in registers
is undesirable.
On the Alpha, we want to not use the byte operation and instead use

2
gcc/config/alpha/alpha.md
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@ -1733,7 +1733,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none"
"ext%M2l %r1,%3,%0"
[(set_attr "type" "shift")])
;; Combine has some strange notion of preserving existing undefined behaviour
;; Combine has some strange notion of preserving existing undefined behavior
;; in shifts larger than a word size. So capture these patterns that it
;; should have turned into zero_extracts.

6
gcc/config/arc/arc.h
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@ -131,7 +131,7 @@ extern int target_flags;
/* Instruction set characteristics.
These are internal macros, set by the appropriate -mcpu= option. */
/* Non-zero means the cpu has a barrel shifter. */
/* Nonzero means the cpu has a barrel shifter. */
#define TARGET_SHIFTER 0
extern const char *arc_cpu_string;
@ -149,7 +149,7 @@ extern const char *arc_text_string,*arc_data_string,*arc_rodata_string;
extern int arc_cpu_type;
/* Check if CPU is an extension and set `arc_cpu_type' and `arc_mangle_cpu'
appropriately. The result should be non-zero if the cpu is recognized,
appropriately. The result should be nonzero if the cpu is recognized,
otherwise zero. This is intended to be redefined in a cover file.
This is used by arc_init. */
#define ARC_EXTENSION_CPU(cpu) 0
@ -989,7 +989,7 @@ do { \
#define SELECT_CC_MODE(OP, X, Y) \
arc_select_cc_mode (OP, X, Y)
/* Return non-zero if SELECT_CC_MODE will never return MODE for a
/* Return nonzero if SELECT_CC_MODE will never return MODE for a
floating point inequality comparison. */
#define REVERSIBLE_CC_MODE(MODE) 1 /*???*/

10
gcc/config/arm/arm.c
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@ -2207,7 +2207,7 @@ current_file_function_operand (sym_ref)
return 0;
}
/* Return non-zero if a 32 bit "long_call" should be generated for
/* Return nonzero if a 32 bit "long_call" should be generated for
this call. We generate a long_call if the function:
a. has an __attribute__((long call))
@ -2260,7 +2260,7 @@ arm_is_longcall_p (sym_ref, call_cookie, call_symbol)
|| TARGET_LONG_CALLS;
}
/* Return non-zero if it is ok to make a tail-call to DECL. */
/* Return nonzero if it is ok to make a tail-call to DECL. */
int
arm_function_ok_for_sibcall (decl)
@ -8059,7 +8059,7 @@ emit_sfm (base_reg, count)
may not be needed, giving rise to the possibility of
eliminating some of the registers.
The values returned by this function must reflect the behaviour
The values returned by this function must reflect the behavior
of arm_expand_prologue() and arm_compute_save_reg_mask().
The sign of the number returned reflects the direction of stack
@ -9872,7 +9872,7 @@ thumb_shiftable_const (val)
return 0;
}
/* Returns non-zero if the current function contains,
/* Returns nonzero if the current function contains,
or might contain a far jump. */
int
@ -9942,7 +9942,7 @@ thumb_far_jump_used_p (in_prologue)
return 0;
}
/* Return non-zero if FUNC must be entered in ARM mode. */
/* Return nonzero if FUNC must be entered in ARM mode. */
int
is_called_in_ARM_mode (func)

2
gcc/config/arm/arm.h
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@ -728,7 +728,7 @@ extern int arm_structure_size_boundary;
/* Used when parsing command line option -mstructure_size_boundary. */
extern const char * structure_size_string;
/* Non-zero if move instructions will actually fail to work
/* Nonzero if move instructions will actually fail to work
when given unaligned data. */
#define STRICT_ALIGNMENT 1

2
gcc/config/arm/arm.md
View File

@ -8427,7 +8427,7 @@
; We must watch to see that the source/destination register isn't also the
; same as the base address register, and that if the index is a register,
; that it is not the same as the base address register. In such cases the
; instruction that we would generate would have UNPREDICTABLE behaviour so
; instruction that we would generate would have UNPREDICTABLE behavior so
; we cannot use it.
(define_peephole

8
gcc/config/arm/pe.c
View File

@ -32,7 +32,7 @@ Boston, MA 02111-1307, USA. */
extern int current_function_anonymous_args;
/* Return non-zero if DECL is a dllexport'd object. */
/* Return nonzero if DECL is a dllexport'd object. */
tree current_class_type; /* FIXME */
@ -52,7 +52,7 @@ arm_dllexport_p (decl)
return 0;
}
/* Return non-zero if DECL is a dllimport'd object. */
/* Return nonzero if DECL is a dllimport'd object. */
int
arm_dllimport_p (decl)
@ -74,7 +74,7 @@ arm_dllimport_p (decl)
return 0;
}
/* Return non-zero if SYMBOL is marked as being dllexport'd. */
/* Return nonzero if SYMBOL is marked as being dllexport'd. */
int
arm_dllexport_name_p (symbol)
@ -83,7 +83,7 @@ arm_dllexport_name_p (symbol)
return symbol[0] == ARM_PE_FLAG_CHAR && symbol[1] == 'e' && symbol[2] == '.';
}
/* Return non-zero if SYMBOL is marked as being dllimport'd. */
/* Return nonzero if SYMBOL is marked as being dllimport'd. */
int
arm_dllimport_name_p (symbol)

2
gcc/config/arm/unknown-elf.h
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@ -47,7 +47,7 @@ Boston, MA 02111-1307, USA. */
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
/* Return a non-zero value if DECL has a section attribute. */
/* Return a nonzero value if DECL has a section attribute. */
#define IN_NAMED_SECTION(DECL) \
((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
&& DECL_SECTION_NAME (DECL) != NULL_TREE)

8
gcc/config/avr/avr.c
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@ -338,7 +338,7 @@ avr_reg_class_from_letter (c)
return NO_REGS;
}
/* Return non-zero if FUNC is a naked function. */
/* Return nonzero if FUNC is a naked function. */
static int
avr_naked_function_p (func)
@ -4433,7 +4433,7 @@ adjust_insn_length (insn, len)
return len;
}
/* Return non-zero if register REG dead after INSN */
/* Return nonzero if register REG dead after INSN */
int
reg_unused_after (insn, reg)
@ -4444,7 +4444,7 @@ reg_unused_after (insn, reg)
|| (REG_P(reg) && _reg_unused_after (insn, reg)));
}
/* Return non-zero if REG is not used after INSN.
/* Return nonzero if REG is not used after INSN.
We assume REG is a reload reg, and therefore does
not live past labels. It may live past calls or jumps though. */
@ -5250,7 +5250,7 @@ avr_function_value (type, func)
return gen_rtx (REG, BLKmode, RET_REGISTER + 2 - offs);
}
/* Returns non-zero if the number MASK has only one bit set. */
/* Returns nonzero if the number MASK has only one bit set. */
int
mask_one_bit_p (mask)

20
gcc/config/avr/avr.h
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@ -731,7 +731,7 @@ enum reg_class {
/* `SECONDARY_MEMORY_NEEDED (CLASS1, CLASS2, M)'
Certain machines have the property that some registers cannot be
copied to some other registers without using memory. Define this
macro on those machines to be a C expression that is non-zero if
macro on those machines to be a C expression that is nonzero if
objects of mode M in registers of CLASS1 can only be copied to
registers of class CLASS2 by storing a register of CLASS1 into
memory and loading that memory location into a register of CLASS2.
@ -755,16 +755,16 @@ enum reg_class {
classes that there would not be enough registers to use as spill
registers if this were done.
Define `SMALL_REGISTER_CLASSES' to be an expression with a non-zero
value on these machines. When this macro has a non-zero value, the
Define `SMALL_REGISTER_CLASSES' to be an expression with a nonzero
value on these machines. When this macro has a nonzero value, the
compiler allows registers explicitly used in the rtl to be used as
spill registers but avoids extending the lifetime of these
registers.
It is always safe to define this macro with a non-zero value, but
It is always safe to define this macro with a nonzero value, but
if you unnecessarily define it, you will reduce the amount of
optimizations that can be performed in some cases. If you do not
define this macro with a non-zero value when it is required, the
define this macro with a nonzero value when it is required, the
compiler will run out of spill registers and print a fatal error
message. For most machines, you should not define this macro at
all. */
@ -999,7 +999,7 @@ enum reg_class {
|| (FROM) == FRAME_POINTER_REGNUM+1) \
&& ! FRAME_POINTER_REQUIRED \
))
/* A C expression that returns non-zero if the compiler is allowed to
/* A C expression that returns nonzero if the compiler is allowed to
try to replace register number FROM-REG with register number
TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
defined, and will usually be the constant 1, since most of the
@ -1115,7 +1115,7 @@ enum reg_class {
You may use the macro `MUST_PASS_IN_STACK (MODE, TYPE)' in the
definition of this macro to determine if this argument is of a
type that must be passed in the stack. If `REG_PARM_STACK_SPACE'
is not defined and `FUNCTION_ARG' returns non-zero for such an
is not defined and `FUNCTION_ARG' returns nonzero for such an
argument, the compiler will abort. If `REG_PARM_STACK_SPACE' is
defined, the argument will be computed in the stack and then
loaded into a register. */
@ -1679,10 +1679,10 @@ do { \
cost many times greater than aligned accesses, for example if they
are emulated in a trap handler.
When this macro is non-zero, the compiler will act as if
`STRICT_ALIGNMENT' were non-zero when generating code for block
When this macro is nonzero, the compiler will act as if
`STRICT_ALIGNMENT' were nonzero when generating code for block
moves. This can cause significantly more instructions to be
produced. Therefore, do not set this macro non-zero if unaligned
produced. Therefore, do not set this macro nonzero if unaligned
accesses only add a cycle or two to the time for a memory access.
If the value of this macro is always zero, it need not be defined.

6
gcc/config/c4x/c4x.c
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@ -436,7 +436,7 @@ c4x_hard_regno_mode_ok (regno, mode)
return 0;
}
/* Return non-zero if REGNO1 can be renamed to REGNO2. */
/* Return nonzero if REGNO1 can be renamed to REGNO2. */
int
c4x_hard_regno_rename_ok (regno1, regno2)
unsigned int regno1;
@ -3366,10 +3366,10 @@ src_operand (op, mode)
|| GET_CODE (op) == CONST)
return 0;
/* If TARGET_LOAD_DIRECT_MEMS is non-zero, disallow direct memory
/* If TARGET_LOAD_DIRECT_MEMS is nonzero, disallow direct memory
access to symbolic addresses. These operands will get forced
into a register and the movqi expander will generate a
HIGH/LO_SUM pair if TARGET_EXPOSE_LDP is non-zero. */
HIGH/LO_SUM pair if TARGET_EXPOSE_LDP is nonzero. */
if (GET_CODE (op) == MEM
&& ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
|| GET_CODE (XEXP (op, 0)) == LABEL_REF

6
gcc/config/cris/cris.c
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@ -2315,7 +2315,7 @@ cris_legitimate_pic_operand (x)
return ! cris_symbol (x) || cris_got_symbol (x);
}
/* Return non-zero if there's a SYMBOL_REF or LABEL_REF hiding inside this
/* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
CONSTANT_P. */
int
@ -2352,7 +2352,7 @@ cris_symbol (x)
return 1;
}
/* Return non-zero if there's a SYMBOL_REF or LABEL_REF hiding inside this
/* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
CONSTANT_P, and the symbol does not need a GOT entry. Also set
current_function_uses_pic_offset_table if we're generating PIC and ever
see something that would need one. */
@ -2410,7 +2410,7 @@ cris_gotless_symbol (x)
return 1;
}
/* Return non-zero if there's a SYMBOL_REF or LABEL_REF hiding inside this
/* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
CONSTANT_P, and the symbol needs a GOT entry. */
int

4
gcc/config/cris/cris.h
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@ -1030,7 +1030,7 @@ struct cum_args {int regs;};
/* We save the register number of the first anonymous argument in
first_vararg_reg, and take care of this in the function prologue.
This behaviour is used by at least one more port (the ARM?), but
This behavior is used by at least one more port (the ARM?), but
may be unsafe when compiling nested functions. (With varargs? Hairy.)
Note that nested-functions is a GNU C extension.
@ -1242,7 +1242,7 @@ struct cum_args {int regs;};
/* For now, don't do anything. GCC does a good job most often.
Maybe we could do something about gcc:s misbehaviour when it
Maybe we could do something about gcc:s misbehavior when it
recalculates frame offsets for local variables, from fp+offs to
sp+offs. The resulting address expression gets screwed up
sometimes, but I'm not sure that it may be fixed here, since it is