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sparc.c (TARGET_TRAMPOLINE_INIT): New.
* config/sparc/sparc.c (TARGET_TRAMPOLINE_INIT): New.
(sparc32_initialize_trampoline): Rename from
sparc_initialize_trampoline; make static; replace tramp parameter
with m_tramp and update memory accesses.
(sparc64_initialize_trampoline): Similarly.
(sparc_trampoline_init): New.
* config/sparc/sparc-protos.h: Remove trampoline decls.
* config/sparc/sparc.h (INITIALIZE_TRAMPOLINE): Remove.
* config/sparc/sparc.md (nonlocal_goto): Don't use static_chain_rtx.
From-SVN: r152012
This commit is contained in:
Richard Henderson
Richard Henderson
parent
994322ef6e
commit
809e78cc90
@ -253,6 +253,16 @@
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* config/sh/sh.h (INITIALIZE_TRAMPOLINE): New.
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(TRAMPOLINE_ADJUST_ADDRESS): Move code to sh_trampoline_adjust_address.
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* config/sparc/sparc.c (TARGET_TRAMPOLINE_INIT): New.
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(sparc32_initialize_trampoline): Rename from
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sparc_initialize_trampoline; make static; replace tramp parameter
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with m_tramp and update memory accesses.
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(sparc64_initialize_trampoline): Similarly.
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(sparc_trampoline_init): New.
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* config/sparc/sparc-protos.h: Remove trampoline decls.
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* config/sparc/sparc.h (INITIALIZE_TRAMPOLINE): Remove.
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* config/sparc/sparc.md (nonlocal_goto): Don't use static_chain_rtx.
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2009-09-22 Jakub Jelinek <jakub@redhat.com>
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* config/rs6000/rs6000.c (bdesc_2arg): Fix CODE_FOR_vector_gt* codes
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@ -61,9 +61,6 @@ extern void sparc_emit_fixunsdi (rtx [2], enum machine_mode);
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extern void emit_tfmode_binop (enum rtx_code, rtx *);
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extern void emit_tfmode_unop (enum rtx_code, rtx *);
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extern void emit_tfmode_cvt (enum rtx_code, rtx *);
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/* This function handles all v9 scc insns */
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extern void sparc_initialize_trampoline (rtx, rtx, rtx);
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extern void sparc64_initialize_trampoline (rtx, rtx, rtx);
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extern bool legitimate_constant_p (rtx);
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extern bool constant_address_p (rtx);
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extern bool legitimate_pic_operand_p (rtx);
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@ -424,6 +424,7 @@ static bool sparc_can_eliminate (const int, const int);
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#ifdef TARGET_ALTERNATE_LONG_DOUBLE_MANGLING
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static const char *sparc_mangle_type (const_tree);
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#endif
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static void sparc_trampoline_init (rtx, tree, rtx);
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#ifdef SUBTARGET_ATTRIBUTE_TABLE
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/* Table of valid machine attributes. */
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@ -600,6 +601,9 @@ static bool fpu_option_set = false;
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#undef TARGET_LEGITIMATE_ADDRESS_P
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#define TARGET_LEGITIMATE_ADDRESS_P sparc_legitimate_address_p
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#undef TARGET_TRAMPOLINE_INIT
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#define TARGET_TRAMPOLINE_INIT sparc_trampoline_init
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struct gcc_target targetm = TARGET_INITIALIZER;
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/* Implement TARGET_HANDLE_OPTION. */
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@ -7404,8 +7408,8 @@ sparc_type_code (register tree type)
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Emit enough FLUSH insns to synchronize the data and instruction caches. */
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void
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sparc_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
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static void
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sparc32_initialize_trampoline (rtx m_tramp, rtx fnaddr, rtx cxt)
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{
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/* SPARC 32-bit trampoline:
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@ -7419,7 +7423,7 @@ sparc_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
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*/
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emit_move_insn
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(gen_rtx_MEM (SImode, plus_constant (tramp, 0)),
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(adjust_address (m_tramp, SImode, 0),
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expand_binop (SImode, ior_optab,
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expand_shift (RSHIFT_EXPR, SImode, fnaddr,
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size_int (10), 0, 1),
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@ -7427,7 +7431,7 @@ sparc_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
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NULL_RTX, 1, OPTAB_DIRECT));
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emit_move_insn
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(gen_rtx_MEM (SImode, plus_constant (tramp, 4)),
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(adjust_address (m_tramp, SImode, 4),
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expand_binop (SImode, ior_optab,
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expand_shift (RSHIFT_EXPR, SImode, cxt,
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size_int (10), 0, 1),
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@ -7435,14 +7439,14 @@ sparc_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
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NULL_RTX, 1, OPTAB_DIRECT));
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emit_move_insn
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(gen_rtx_MEM (SImode, plus_constant (tramp, 8)),
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(adjust_address (m_tramp, SImode, 8),
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expand_binop (SImode, ior_optab,
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expand_and (SImode, fnaddr, GEN_INT (0x3ff), NULL_RTX),
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GEN_INT (trunc_int_for_mode (0x81c06000, SImode)),
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NULL_RTX, 1, OPTAB_DIRECT));
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emit_move_insn
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(gen_rtx_MEM (SImode, plus_constant (tramp, 12)),
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(adjust_address (m_tramp, SImode, 12),
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expand_binop (SImode, ior_optab,
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expand_and (SImode, cxt, GEN_INT (0x3ff), NULL_RTX),
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GEN_INT (trunc_int_for_mode (0x8410a000, SImode)),
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@ -7450,19 +7454,18 @@ sparc_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
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/* On UltraSPARC a flush flushes an entire cache line. The trampoline is
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aligned on a 16 byte boundary so one flush clears it all. */
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emit_insn (gen_flush (validize_mem (gen_rtx_MEM (SImode, tramp))));
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emit_insn (gen_flush (validize_mem (adjust_address (m_tramp, SImode, 0))));
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if (sparc_cpu != PROCESSOR_ULTRASPARC
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&& sparc_cpu != PROCESSOR_ULTRASPARC3
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&& sparc_cpu != PROCESSOR_NIAGARA
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&& sparc_cpu != PROCESSOR_NIAGARA2)
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emit_insn (gen_flush (validize_mem (gen_rtx_MEM (SImode,
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plus_constant (tramp, 8)))));
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emit_insn (gen_flush (validize_mem (adjust_address (m_tramp, SImode, 8))));
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/* Call __enable_execute_stack after writing onto the stack to make sure
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the stack address is accessible. */
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#ifdef ENABLE_EXECUTE_STACK
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emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
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LCT_NORMAL, VOIDmode, 1, tramp, Pmode);
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LCT_NORMAL, VOIDmode, 1, XEXP (m_tramp, 0), Pmode);
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#endif
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}
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@ -7471,8 +7474,8 @@ sparc_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
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values as "immediate" data out of the trampoline. It's also easier since
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we can read the PC without clobbering a register. */
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void
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sparc64_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
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static void
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sparc64_initialize_trampoline (rtx m_tramp, rtx fnaddr, rtx cxt)
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{
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/* SPARC 64-bit trampoline:
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@ -7483,31 +7486,44 @@ sparc64_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
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+16 bytes data
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*/
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emit_move_insn (gen_rtx_MEM (SImode, tramp),
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emit_move_insn (adjust_address (m_tramp, SImode, 0),
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GEN_INT (trunc_int_for_mode (0x83414000, SImode)));
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 4)),
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emit_move_insn (adjust_address (m_tramp, SImode, 4),
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GEN_INT (trunc_int_for_mode (0xca586018, SImode)));
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 8)),
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emit_move_insn (adjust_address (m_tramp, SImode, 8),
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GEN_INT (trunc_int_for_mode (0x81c14000, SImode)));
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 12)),
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emit_move_insn (adjust_address (m_tramp, SImode, 12),
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GEN_INT (trunc_int_for_mode (0xca586010, SImode)));
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emit_move_insn (gen_rtx_MEM (DImode, plus_constant (tramp, 16)), cxt);
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emit_move_insn (gen_rtx_MEM (DImode, plus_constant (tramp, 24)), fnaddr);
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emit_insn (gen_flushdi (validize_mem (gen_rtx_MEM (DImode, tramp))));
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emit_move_insn (adjust_address (m_tramp, DImode, 16), cxt);
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emit_move_insn (adjust_address (m_tramp, DImode, 24), fnaddr);
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emit_insn (gen_flushdi (validize_mem (adjust_address (m_tramp, DImode, 0))));
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if (sparc_cpu != PROCESSOR_ULTRASPARC
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&& sparc_cpu != PROCESSOR_ULTRASPARC3
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&& sparc_cpu != PROCESSOR_NIAGARA
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&& sparc_cpu != PROCESSOR_NIAGARA2)
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emit_insn (gen_flushdi (validize_mem (gen_rtx_MEM (DImode, plus_constant (tramp, 8)))));
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emit_insn (gen_flushdi (validize_mem (adjust_address (m_tramp, DImode, 8))));
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/* Call __enable_execute_stack after writing onto the stack to make sure
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the stack address is accessible. */
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#ifdef ENABLE_EXECUTE_STACK
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emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
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LCT_NORMAL, VOIDmode, 1, tramp, Pmode);
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LCT_NORMAL, VOIDmode, 1, XEXP (m_tramp, 0), Pmode);
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#endif
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}
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/* Worker for TARGET_TRAMPOLINE_INIT. */
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static void
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sparc_trampoline_init (rtx m_tramp, tree fndecl, rtx cxt)
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{
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rtx fnaddr = force_reg (Pmode, XEXP (DECL_RTL (fndecl), 0));
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cxt = force_reg (Pmode, cxt);
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if (TARGET_ARCH64)
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sparc64_initialize_trampoline (m_tramp, fnaddr, cxt);
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else
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sparc32_initialize_trampoline (m_tramp, fnaddr, cxt);
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}
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/* Adjust the cost of a scheduling dependency. Return the new cost of
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a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
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@ -1612,16 +1612,6 @@ do { \
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#define TRAMPOLINE_SIZE (TARGET_ARCH64 ? 32 : 16)
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#define TRAMPOLINE_ALIGNMENT 128 /* 16 bytes */
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/* Emit RTL insns to initialize the variable parts of a trampoline.
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FNADDR is an RTX for the address of the function's pure code.
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CXT is an RTX for the static chain value for the function. */
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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if (TARGET_ARCH64) \
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sparc64_initialize_trampoline (TRAMP, FNADDR, CXT); \
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else \
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sparc_initialize_trampoline (TRAMP, FNADDR, CXT)
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/* Generate RTL to flush the register windows so as to make arbitrary frames
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available. */
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@ -6397,7 +6397,6 @@
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emit_move_insn (hard_frame_pointer_rtx, stack);
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emit_use (stack_pointer_rtx);
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emit_use (static_chain_rtx);
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/* ??? The V9-specific version was disabled in rev 1.65. */
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emit_jump_insn (gen_goto_handler_and_restore (labreg));
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