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i386-protos.c (ix86_lea_outperforms): Remove prototype.
* config/i386/i386-protos.c (ix86_lea_outperforms): Remove prototype. * config/i386/i386.c (ix86_lea_outperforms): Make static. Make split_cost argument signed. (ix86_avoid_lea_for_add): Cleanup. (ix86_use_lea_for_mov): Use INVALID_REGNUM instead of -1. (ix86_avoid_lea_for_addr): Ditto. Make split_cost signed. Use gen_lowpart instead of gen_rtx_SUBREG. Cleanup. From-SVN: r189792
This commit is contained in:
Uros Bizjak
Uros Bizjak
parent
7839a79c96
commit
8046c60427
gcc
@ -1,3 +1,13 @@
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2012-07-23 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386-protos.c (ix86_lea_outperforms): Remove prototype.
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* config/i386/i386.c (ix86_lea_outperforms): Make static. Make
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split_cost argument signed.
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(ix86_avoid_lea_for_add): Cleanup.
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(ix86_use_lea_for_mov): Use INVALID_REGNUM instead of -1.
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(ix86_avoid_lea_for_addr): Ditto. Make split_cost signed.
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Use gen_lowpart instead of gen_rtx_SUBREG. Cleanup.
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2012-07-23 Ulrich Weigand <ulrich.weigand@linaro.org>
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* config/arm/arm.c (arm_reorg): Ensure all insns are split.
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@ -92,8 +92,6 @@ extern void ix86_fixup_binary_operands_no_copy (enum rtx_code,
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extern void ix86_expand_binary_operator (enum rtx_code,
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enum machine_mode, rtx[]);
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extern bool ix86_binary_operator_ok (enum rtx_code, enum machine_mode, rtx[]);
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extern bool ix86_lea_outperforms (rtx, unsigned int, unsigned int,
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unsigned int, unsigned int);
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extern bool ix86_avoid_lea_for_add (rtx, rtx[]);
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extern bool ix86_use_lea_for_mov (rtx, rtx[]);
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extern bool ix86_avoid_lea_for_addr (rtx, rtx[]);
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@ -16805,9 +16805,9 @@ distance_agu_use (unsigned int regno0, rtx insn)
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over a sequence of instructions. Instructions sequence has
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SPLIT_COST cycles higher latency than lea latency. */
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bool
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static bool
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ix86_lea_outperforms (rtx insn, unsigned int regno0, unsigned int regno1,
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unsigned int regno2, unsigned int split_cost)
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unsigned int regno2, int split_cost)
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{
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int dist_define, dist_use;
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@ -16880,9 +16880,7 @@ ix86_ok_to_clobber_flags (rtx insn)
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bool
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ix86_avoid_lea_for_add (rtx insn, rtx operands[])
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{
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unsigned int regno0 = true_regnum (operands[0]);
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unsigned int regno1 = true_regnum (operands[1]);
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unsigned int regno2 = true_regnum (operands[2]);
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unsigned int regno0, regno1, regno2;
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/* Check if we need to optimize. */
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if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun))
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@ -16892,6 +16890,10 @@ ix86_avoid_lea_for_add (rtx insn, rtx operands[])
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if (!ix86_ok_to_clobber_flags(insn))
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return false;
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regno0 = true_regnum (operands[0]);
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regno1 = true_regnum (operands[1]);
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regno2 = true_regnum (operands[2]);
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/* We need to split only adds with non destructive
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destination operand. */
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if (regno0 == regno1 || regno0 == regno2)
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@ -16906,8 +16908,7 @@ ix86_avoid_lea_for_add (rtx insn, rtx operands[])
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bool
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ix86_use_lea_for_mov (rtx insn, rtx operands[])
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{
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unsigned int regno0;
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unsigned int regno1;
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unsigned int regno0, regno1;
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/* Check if we need to optimize. */
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if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun))
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@ -16920,7 +16921,7 @@ ix86_use_lea_for_mov (rtx insn, rtx operands[])
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regno0 = true_regnum (operands[0]);
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regno1 = true_regnum (operands[1]);
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return ix86_lea_outperforms (insn, regno0, regno1, -1, 0);
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return ix86_lea_outperforms (insn, regno0, regno1, INVALID_REGNUM, 0);
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}
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/* Return true if we need to split lea into a sequence of
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@ -16929,10 +16930,8 @@ ix86_use_lea_for_mov (rtx insn, rtx operands[])
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bool
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ix86_avoid_lea_for_addr (rtx insn, rtx operands[])
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{
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unsigned int regno0 = true_regnum (operands[0]) ;
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unsigned int regno1 = -1;
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unsigned int regno2 = -1;
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unsigned int split_cost = 0;
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unsigned int regno0, regno1, regno2;
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int split_cost;
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struct ix86_address parts;
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int ok;
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@ -16957,11 +16956,17 @@ ix86_avoid_lea_for_addr (rtx insn, rtx operands[])
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if (parts.disp && flag_pic && !LEGITIMATE_PIC_OPERAND_P (parts.disp))
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return false;
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regno0 = true_regnum (operands[0]) ;
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regno1 = INVALID_REGNUM;
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regno2 = INVALID_REGNUM;
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if (parts.base)
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regno1 = true_regnum (parts.base);
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if (parts.index)
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regno2 = true_regnum (parts.index);
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split_cost = 0;
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/* Compute how many cycles we will add to execution time
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if split lea into a sequence of instructions. */
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if (parts.base || parts.index)
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@ -17021,27 +17026,31 @@ ix86_emit_binop (enum rtx_code code, enum machine_mode mode,
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extern void
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ix86_split_lea_for_addr (rtx operands[], enum machine_mode mode)
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{
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unsigned int regno0 = true_regnum (operands[0]) ;
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unsigned int regno1 = INVALID_REGNUM;
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unsigned int regno2 = INVALID_REGNUM;
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unsigned int regno0, regno1, regno2;
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struct ix86_address parts;
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rtx tmp;
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rtx target, tmp;
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int ok, adds;
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ok = ix86_decompose_address (operands[1], &parts);
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gcc_assert (ok);
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target = operands[0];
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regno0 = true_regnum (target);
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regno1 = INVALID_REGNUM;
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regno2 = INVALID_REGNUM;
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if (parts.base)
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{
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if (GET_MODE (parts.base) != mode)
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parts.base = gen_rtx_SUBREG (mode, parts.base, 0);
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parts.base = gen_lowpart (mode, parts.base);
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regno1 = true_regnum (parts.base);
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}
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if (parts.index)
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{
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if (GET_MODE (parts.index) != mode)
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parts.index = gen_rtx_SUBREG (mode, parts.index, 0);
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parts.index = gen_lowpart (mode, parts.index);
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regno2 = true_regnum (parts.index);
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}
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@ -17057,41 +17066,41 @@ ix86_split_lea_for_addr (rtx operands[], enum machine_mode mode)
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gcc_assert (regno2 != regno0);
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for (adds = parts.scale; adds > 0; adds--)
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ix86_emit_binop (PLUS, mode, operands[0], parts.index);
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ix86_emit_binop (PLUS, mode, target, parts.index);
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}
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else
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{
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/* r1 = r2 + r3 * C case. Need to move r3 into r1. */
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if (regno0 != regno2)
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], parts.index));
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emit_insn (gen_rtx_SET (VOIDmode, target, parts.index));
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/* Use shift for scaling. */
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ix86_emit_binop (ASHIFT, mode, operands[0],
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ix86_emit_binop (ASHIFT, mode, target,
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GEN_INT (exact_log2 (parts.scale)));
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if (parts.base)
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ix86_emit_binop (PLUS, mode, operands[0], parts.base);
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ix86_emit_binop (PLUS, mode, target, parts.base);
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if (parts.disp && parts.disp != const0_rtx)
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ix86_emit_binop (PLUS, mode, operands[0], parts.disp);
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ix86_emit_binop (PLUS, mode, target, parts.disp);
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}
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}
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else if (!parts.base && !parts.index)
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{
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gcc_assert(parts.disp);
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], parts.disp));
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emit_insn (gen_rtx_SET (VOIDmode, target, parts.disp));
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}
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else
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{
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if (!parts.base)
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{
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if (regno0 != regno2)
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], parts.index));
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emit_insn (gen_rtx_SET (VOIDmode, target, parts.index));
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}
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else if (!parts.index)
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{
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if (regno0 != regno1)
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], parts.base));
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emit_insn (gen_rtx_SET (VOIDmode, target, parts.base));
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}
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else
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{
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@ -17101,15 +17110,15 @@ ix86_split_lea_for_addr (rtx operands[], enum machine_mode mode)
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tmp = parts.base;
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else
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{
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], parts.base));
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emit_insn (gen_rtx_SET (VOIDmode, target, parts.base));
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tmp = parts.index;
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}
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ix86_emit_binop (PLUS, mode, operands[0], tmp);
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ix86_emit_binop (PLUS, mode, target, tmp);
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}
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if (parts.disp && parts.disp != const0_rtx)
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ix86_emit_binop (PLUS, mode, operands[0], parts.disp);
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ix86_emit_binop (PLUS, mode, target, parts.disp);
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}
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}
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