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re PR target/48252 (ARM neon: problem with consecutive vzip, vuzp and vtrn)
PR target/48252 * config/arm/arm.c (neon_emit_pair_result_insn): Swap arguments to match neon_vzip/vuzp/vtrn_internal. * config/arm/neon.md (neon_vtrn<mode>_internal): Make both outputs explicitly dependent on both inputs. (neon_vzip<mode>_internal, neon_vuzp<mode>_internal): Likewise. Co-Authored-By: Ira Rosen <ira.rosen@linaro.org> From-SVN: r172639
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@ -1,3 +1,13 @@
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2011-04-18 Ulrich Weigand <ulrich.weigand@linaro.org>
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Ira Rosen <ira.rosen@linaro.org>
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PR target/48252
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* config/arm/arm.c (neon_emit_pair_result_insn): Swap arguments
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to match neon_vzip/vuzp/vtrn_internal.
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* config/arm/neon.md (neon_vtrn<mode>_internal): Make both
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outputs explicitly dependent on both inputs.
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(neon_vzip<mode>_internal, neon_vuzp<mode>_internal): Likewise.
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2011-04-18 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/48616
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@ -19632,7 +19632,7 @@ neon_emit_pair_result_insn (enum machine_mode mode,
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rtx tmp1 = gen_reg_rtx (mode);
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rtx tmp2 = gen_reg_rtx (mode);
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emit_insn (intfn (tmp1, op1, tmp2, op2));
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emit_insn (intfn (tmp1, op1, op2, tmp2));
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emit_move_insn (mem, tmp1);
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mem = adjust_address (mem, mode, GET_MODE_SIZE (mode));
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@ -4092,13 +4092,14 @@
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(define_insn "neon_vtrn<mode>_internal"
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[(set (match_operand:VDQW 0 "s_register_operand" "=w")
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(unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]
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UNSPEC_VTRN1))
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(set (match_operand:VDQW 2 "s_register_operand" "=w")
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(unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]
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UNSPEC_VTRN2))]
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(unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
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(match_operand:VDQW 2 "s_register_operand" "w")]
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UNSPEC_VTRN1))
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(set (match_operand:VDQW 3 "s_register_operand" "=2")
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(unspec:VDQW [(match_dup 1) (match_dup 2)]
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UNSPEC_VTRN2))]
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"TARGET_NEON"
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"vtrn.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"
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"vtrn.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"
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[(set (attr "neon_type")
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(if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
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(const_string "neon_bp_simple")
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@ -4118,13 +4119,14 @@
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(define_insn "neon_vzip<mode>_internal"
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[(set (match_operand:VDQW 0 "s_register_operand" "=w")
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(unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]
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UNSPEC_VZIP1))
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(set (match_operand:VDQW 2 "s_register_operand" "=w")
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(unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]
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UNSPEC_VZIP2))]
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(unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
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(match_operand:VDQW 2 "s_register_operand" "w")]
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UNSPEC_VZIP1))
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(set (match_operand:VDQW 3 "s_register_operand" "=2")
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(unspec:VDQW [(match_dup 1) (match_dup 2)]
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UNSPEC_VZIP2))]
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"TARGET_NEON"
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"vzip.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"
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"vzip.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"
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[(set (attr "neon_type")
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(if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
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(const_string "neon_bp_simple")
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@ -4144,13 +4146,14 @@
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(define_insn "neon_vuzp<mode>_internal"
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[(set (match_operand:VDQW 0 "s_register_operand" "=w")
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(unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]
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(unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
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(match_operand:VDQW 2 "s_register_operand" "w")]
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UNSPEC_VUZP1))
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(set (match_operand:VDQW 2 "s_register_operand" "=w")
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(unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]
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UNSPEC_VUZP2))]
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(set (match_operand:VDQW 3 "s_register_operand" "=2")
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(unspec:VDQW [(match_dup 1) (match_dup 2)]
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UNSPEC_VUZP2))]
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"TARGET_NEON"
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"vuzp.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"
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"vuzp.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"
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[(set (attr "neon_type")
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(if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
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(const_string "neon_bp_simple")
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@ -1,3 +1,9 @@
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2011-04-18 Ulrich Weigand <ulrich.weigand@linaro.org>
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Ira Rosen <ira.rosen@linaro.org>
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PR target/48252
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* gcc.target/arm/pr48252.c: New test.
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2011-04-18 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/48616
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31
gcc/testsuite/gcc.target/arm/pr48252.c
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31
gcc/testsuite/gcc.target/arm/pr48252.c
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@ -0,0 +1,31 @@
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/* { dg-do run } */
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/* { dg-require-effective-target arm_neon_hw } */
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/* { dg-options "-O2" } */
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/* { dg-add-options arm_neon } */
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#include "arm_neon.h"
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#include <stdlib.h>
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int main(void)
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{
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uint8x8_t v1 = {1, 1, 1, 1, 1, 1, 1, 1};
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uint8x8_t v2 = {2, 2, 2, 2, 2, 2, 2, 2};
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uint8x8x2_t vd1, vd2;
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union {uint8x8_t v; uint8_t buf[8];} d1, d2, d3, d4;
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int i;
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vd1 = vzip_u8(v1, vdup_n_u8(0));
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vd2 = vzip_u8(v2, vdup_n_u8(0));
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vst1_u8(d1.buf, vd1.val[0]);
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vst1_u8(d2.buf, vd1.val[1]);
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vst1_u8(d3.buf, vd2.val[0]);
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vst1_u8(d4.buf, vd2.val[1]);
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for (i = 0; i < 8; i++)
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if ((i % 2 == 0 && d4.buf[i] != 2)
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|| (i % 2 == 1 && d4.buf[i] != 0))
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abort ();
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return 0;
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}
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