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i386.h (ADDITIONAL_REGISTER_NAMES): Add ymm and zmm register names.
gcc/ * config/i386/i386.h (ADDITIONAL_REGISTER_NAMES): Add ymm and zmm register names. gcc/testsuite/ * gcc.target/i386/avx-additional-reg-names.c: New. * gcc.target/i386/avx512f-additional-reg-names.c: Ditto. From-SVN: r208631
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2013-03-18 Kirill Yukhin <kirill.yukhin@intel.com>
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* config/i386/i386.h (ADDITIONAL_REGISTER_NAMES): Add
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ymm and zmm register names.
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2014-03-17 Jakub Jelinek <jakub@redhat.com>
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PR target/60516
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@ -2016,12 +2016,28 @@ do { \
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/* Table of additional register names to use in user input. */
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#define ADDITIONAL_REGISTER_NAMES \
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{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
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{ "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
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{ "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \
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{ "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \
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{ "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \
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{ "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } }
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{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
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{ "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
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{ "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \
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{ "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \
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{ "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \
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{ "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 }, \
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{ "ymm0", 21}, { "ymm1", 22}, { "ymm2", 23}, { "ymm3", 24}, \
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{ "ymm4", 25}, { "ymm5", 26}, { "ymm6", 27}, { "ymm7", 28}, \
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{ "ymm8", 45}, { "ymm9", 46}, { "ymm10", 47}, { "ymm11", 48}, \
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{ "ymm12", 49}, { "ymm13", 50}, { "ymm14", 51}, { "ymm15", 52}, \
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{ "ymm16", 53}, { "ymm17", 54}, { "ymm18", 55}, { "ymm19", 56}, \
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{ "ymm20", 57}, { "ymm21", 58}, { "ymm22", 59}, { "ymm23", 60}, \
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{ "ymm24", 61}, { "ymm25", 62}, { "ymm26", 63}, { "ymm27", 64}, \
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{ "ymm28", 65}, { "ymm29", 66}, { "ymm30", 67}, { "ymm31", 68}, \
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{ "zmm0", 21}, { "zmm1", 22}, { "zmm2", 23}, { "zmm3", 24}, \
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{ "zmm4", 25}, { "zmm5", 26}, { "zmm6", 27}, { "zmm7", 28}, \
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{ "zmm8", 45}, { "zmm9", 46}, { "zmm10", 47}, { "zmm11", 48}, \
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{ "zmm12", 49}, { "zmm13", 50}, { "zmm14", 51}, { "zmm15", 52}, \
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{ "zmm16", 53}, { "zmm17", 54}, { "zmm18", 55}, { "zmm19", 56}, \
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{ "zmm20", 57}, { "zmm21", 58}, { "zmm22", 59}, { "zmm23", 60}, \
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{ "zmm24", 61}, { "zmm25", 62}, { "zmm26", 63}, { "zmm27", 64}, \
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{ "zmm28", 65}, { "zmm29", 66}, { "zmm30", 67}, { "zmm31", 68} }
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/* Note we are omitting these since currently I don't know how
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to get gcc to use these, since they want the same but different
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@ -1,3 +1,8 @@
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2014-03-18 Kirill Yukhin <kirill.yukhin@intel.com>
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* gcc.target/i386/avx-additional-reg-names.c: New.
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* gcc.target/i386/avx512f-additional-reg-names.c: Ditto.
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2014-03-17 Adam Butcher <adam@jessamine.co.uk>
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PR c++/60390
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9
gcc/testsuite/gcc.target/i386/avx-additional-reg-names.c
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9
gcc/testsuite/gcc.target/i386/avx-additional-reg-names.c
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/* { dg-do compile } */
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/* { dg-options "-mavx" } */
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void foo ()
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{
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register int ymm_var asm ("ymm4");
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__asm__ __volatile__("vxorpd %%ymm0, %%ymm0, %%ymm7\n" : : : "ymm7" );
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}
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/* { dg-do compile } */
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/* { dg-options "-mavx512f" } */
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void foo ()
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{
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register int zmm_var asm ("zmm9");
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__asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" );
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}
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