From 7a12785c5fc5e9997b9fdeda9ead7900cac3b06d Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 22 Oct 2010 12:43:01 -0700 Subject: [PATCH] Use ABS/NEG+USE for vector modes as well. From-SVN: r165856 --- gcc/ChangeLog | 7 +++++++ gcc/config/i386/i386.c | 36 ++++++++++++++++++------------------ gcc/config/i386/sse.md | 18 ++++++++++++++++++ 3 files changed, 43 insertions(+), 18 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5b18c233a9bd..3f46d4869105 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2010-10-22 Richard Henderson + + * config/i386/i386.c (ix86_expand_fp_absneg_operator): Produce + NEG+USE for vectors as well. + * config/i386/i386.md (*absneg2): New pattern + and splitter. + 2010-10-22 Joseph Myers * gcc.c (DEFAULT_SWITCH_CURTAILS_COMPILATION, diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 547fe5f41fd1..ee88b064e9a7 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -15901,7 +15901,7 @@ void ix86_expand_fp_absneg_operator (enum rtx_code code, enum machine_mode mode, rtx operands[]) { - rtx mask, set, use, clob, dst, src; + rtx mask, set, dst, src; bool use_sse = false; bool vector_mode = VECTOR_MODE_P (mode); enum machine_mode vmode = mode; @@ -15929,26 +15929,26 @@ ix86_expand_fp_absneg_operator (enum rtx_code code, enum machine_mode mode, dst = operands[0]; src = operands[1]; - if (vector_mode) + set = gen_rtx_fmt_e (code, mode, src); + set = gen_rtx_SET (VOIDmode, dst, set); + + if (mask) { - set = gen_rtx_fmt_ee (code == NEG ? XOR : AND, mode, src, mask); - set = gen_rtx_SET (VOIDmode, dst, set); - emit_insn (set); + rtx use, clob; + rtvec par; + + use = gen_rtx_USE (VOIDmode, mask); + if (vector_mode) + par = gen_rtvec (2, set, use); + else + { + clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG)); + par = gen_rtvec (3, set, use, clob); + } + emit_insn (gen_rtx_PARALLEL (VOIDmode, par)); } else - { - set = gen_rtx_fmt_e (code, mode, src); - set = gen_rtx_SET (VOIDmode, dst, set); - if (mask) - { - use = gen_rtx_USE (VOIDmode, mask); - clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG)); - emit_insn (gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (3, set, use, clob))); - } - else - emit_insn (set); - } + emit_insn (set); } /* Expand a copysign operation. Special case operand 0 being a constant. */ diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index b45d73390638..d80be8850bea 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -585,6 +585,24 @@ "" "ix86_expand_fp_absneg_operator (, mode, operands); DONE;") +(define_insn_and_split "*absneg2" + [(set (match_operand:VEC_FLOAT_MODE 0 "register_operand" "=x,x") + (match_operator:VEC_FLOAT_MODE 3 "absneg_operator" + [(match_operand:VEC_FLOAT_MODE 1 "nonimmediate_operand" "0,xm")])) + (use (match_operand:VEC_FLOAT_MODE 2 "nonimmediate_operand" "xm,0"))] + "SSE_VEC_FLOAT_MODE_P (mode) || AVX256_VEC_FLOAT_MODE_P (mode)" + "#" + "&& reload_completed" + [(const_int 0)] +{ + rtx set; + set = gen_rtx_fmt_ee (GET_CODE (operands[3]) == NEG ? XOR : AND, + mode, operands[1], operands[2]); + set = gen_rtx_SET (VOIDmode, operands[0], set); + emit_insn (set); + DONE; +}) + (define_expand "3" [(set (match_operand:AVX256MODEF2P 0 "register_operand" "") (plusminus:AVX256MODEF2P