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arm.md (movqi): On thumb when optimizing...
* arm.md (movqi): On thumb when optimizing, handle loading from memory by describing this as taking a subreg of a zero-extended load into an SImode register. (movhi): Likewise. From-SVN: r104836
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@ -1,3 +1,10 @@
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2005-09-30 Richard Earnshaw <richard.earnshaw@arm.com>
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* arm.md (movqi): On thumb when optimizing, handle loading from
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memory by describing this as taking a subreg of a zero-extended load
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into an SImode register.
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(movhi): Likewise.
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2005-09-30 Daniel Jacobowitz <dan@codesourcery.com>
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* reload1.c (merge_assigned_reloads): Do not change any
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@ -4729,8 +4729,13 @@
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{
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if (!no_new_pseudos)
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{
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if (GET_CODE (operands[0]) != REG)
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operands[1] = force_reg (HImode, operands[1]);
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if (GET_CODE (operands[1]) == CONST_INT)
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{
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rtx reg = gen_reg_rtx (SImode);
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emit_insn (gen_movsi (reg, operands[1]));
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operands[1] = gen_lowpart (HImode, reg);
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}
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/* ??? We shouldn't really get invalid addresses here, but this can
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happen if we are passed a SP (never OK for HImode/QImode) or
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@ -4753,11 +4758,23 @@
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operands[1]
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= replace_equiv_address (operands[1],
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copy_to_reg (XEXP (operands[1], 0)));
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if (GET_CODE (operands[1]) == MEM && optimize > 0)
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{
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rtx reg = gen_reg_rtx (SImode);
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emit_insn (gen_zero_extendhisi2 (reg, operands[1]));
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operands[1] = gen_lowpart (HImode, reg);
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}
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if (GET_CODE (operands[0]) == MEM)
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operands[1] = force_reg (HImode, operands[1]);
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}
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/* Handle loading a large integer during reload. */
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else if (GET_CODE (operands[1]) == CONST_INT
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&& !CONST_OK_FOR_THUMB_LETTER (INTVAL (operands[1]), 'I'))
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{
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/* Handle loading a large integer during reload. */
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/* Writing a constant to memory needs a scratch, which should
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be handled with SECONDARY_RELOADs. */
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gcc_assert (GET_CODE (operands[0]) == REG);
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@ -4938,37 +4955,20 @@
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(match_operand:QI 1 "general_operand" ""))]
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"TARGET_EITHER"
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"
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if (TARGET_ARM)
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/* Everything except mem = const or mem = mem can be done easily */
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if (!no_new_pseudos)
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{
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/* Everything except mem = const or mem = mem can be done easily */
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if (GET_CODE (operands[1]) == CONST_INT)
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{
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rtx reg = gen_reg_rtx (SImode);
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if (!no_new_pseudos)
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{
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if (GET_CODE (operands[1]) == CONST_INT)
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{
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rtx reg = gen_reg_rtx (SImode);
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emit_insn (gen_movsi (reg, operands[1]));
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operands[1] = gen_lowpart (QImode, reg);
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}
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if (GET_CODE (operands[1]) == MEM && optimize > 0)
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{
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rtx reg = gen_reg_rtx (SImode);
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emit_insn (gen_zero_extendqisi2 (reg, operands[1]));
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operands[1] = gen_lowpart (QImode, reg);
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}
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if (GET_CODE (operands[0]) == MEM)
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operands[1] = force_reg (QImode, operands[1]);
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}
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}
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else /* TARGET_THUMB */
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{
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if (!no_new_pseudos)
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{
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if (GET_CODE (operands[0]) != REG)
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operands[1] = force_reg (QImode, operands[1]);
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emit_insn (gen_movsi (reg, operands[1]));
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operands[1] = gen_lowpart (QImode, reg);
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}
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if (TARGET_THUMB)
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{
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/* ??? We shouldn't really get invalid addresses here, but this can
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happen if we are passed a SP (never OK for HImode/QImode) or
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virtual register (rejected by GO_IF_LEGITIMATE_ADDRESS for
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@ -4989,19 +4989,32 @@
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operands[1]
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= replace_equiv_address (operands[1],
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copy_to_reg (XEXP (operands[1], 0)));
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}
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/* Handle loading a large integer during reload. */
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else if (GET_CODE (operands[1]) == CONST_INT
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&& !CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'I'))
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{
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/* Writing a constant to memory needs a scratch, which should
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be handled with SECONDARY_RELOADs. */
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gcc_assert (GET_CODE (operands[0]) == REG);
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}
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operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
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emit_insn (gen_movsi (operands[0], operands[1]));
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DONE;
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}
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if (GET_CODE (operands[1]) == MEM && optimize > 0)
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{
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rtx reg = gen_reg_rtx (SImode);
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emit_insn (gen_zero_extendqisi2 (reg, operands[1]));
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operands[1] = gen_lowpart (QImode, reg);
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}
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if (GET_CODE (operands[0]) == MEM)
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operands[1] = force_reg (QImode, operands[1]);
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}
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else if (TARGET_THUMB
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&& GET_CODE (operands[1]) == CONST_INT
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&& !CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'I'))
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{
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/* Handle loading a large integer during reload. */
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/* Writing a constant to memory needs a scratch, which should
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be handled with SECONDARY_RELOADs. */
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gcc_assert (GET_CODE (operands[0]) == REG);
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operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
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emit_insn (gen_movsi (operands[0], operands[1]));
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DONE;
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}
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"
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)
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